X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fhaskell-symposium-talk.git;a=blobdiff_plain;f=PolyAlu.hs;fp=PolyAlu.hs;h=b9d0da8fc0dba054fad394a4e32e548c42f9154d;hp=a464ffbaea172d76f2c361e6f5f77978dc1ec74c;hb=8dbb9f84b45c91f448bdb71067b450014c2d4b64;hpb=b4b0e8a2e09609f70bc5ed0fb69a8d966e4a6813

diff --git a/PolyAlu.hs b/PolyAlu.hs
index a464ffb..b9d0da8 100644
--- a/PolyAlu.hs
+++ b/PolyAlu.hs
@@ -5,27 +5,27 @@ module Main where
 import CLasH.HardwareTypes
 import CLasH.Translator.Annotations
 import qualified Prelude as P
-{-# LINE 51 "PolyAlu.lhs" #-}
+{-# LINE 52 "PolyAlu.lhs" #-}
 type Op a         =   a -> a -> a
-{-# LINE 58 "PolyAlu.lhs" #-}
+type Opcode       =   Bit
+{-# LINE 60 "PolyAlu.lhs" #-}
 type RegBank s a    =   
   Vector (s :+: D1) a
 type RegState s a   =   
   State (RegBank s a)
-{-# LINE 66 "PolyAlu.lhs" #-}
+{-# LINE 68 "PolyAlu.lhs" #-}
 type Word = SizedInt D12
-{-# LINE 85 "PolyAlu.lhs" #-}
-type Opcode         =   Bit
+{-# LINE 88 "PolyAlu.lhs" #-}
 alu :: 
   Op a -> Op a -> 
   Opcode -> a -> a -> a
 alu op1 op2 Low    a b = op1 a b
 alu op1 op2 High   a b = op2 a b
-{-# LINE 108 "PolyAlu.lhs" #-}
+{-# LINE 110 "PolyAlu.lhs" #-}
 registers :: 
   ((NaturalT s ,PositiveT (s :+: D1),((s :+: D1) :>: s) ~ True )) => a -> RangedWord s ->
   RangedWord s -> (RegState s a) -> (RegState s a, a )
-{-# LINE 116 "PolyAlu.lhs" #-}
+{-# LINE 118 "PolyAlu.lhs" #-}
 registers data_in rdaddr wraddr (State mem) = 
   ((State mem'), data_out)
   where