From: Matthijs Kooijman Date: Sun, 13 Dec 2009 21:29:13 +0000 (+0100) Subject: Merge git://github.com/christiaanb/thesispresentation X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Ffinal-presentation.git;a=commitdiff_plain;h=d61f2fb6e73a8a2233bc4f40c126e4fa1cce770a;hp=6ff5e54ce41654b64aec29f5bb67ecb1bcadb38e Merge git://github.com/christiaanb/thesispresentation * git://github.com/christiaanb/thesispresentation: Fix picture Use \clash command. Fix pictures CLaSH is now CAES Language for Synchronous Hardware --- diff --git a/christiaan/fir.lhs b/christiaan/fir.lhs index a35efb6..01a5666 100644 --- a/christiaan/fir.lhs +++ b/christiaan/fir.lhs @@ -48,7 +48,7 @@ \frametitle{Synthesized Output} \vspace{-0.8em} \begin{figure} - \centerline{\includegraphics[width=\paperwidth,trim=9mm 4cm 14mm 4cm, clip=true]{fir0.png}} + \centerline{\includegraphics[width=\paperwidth,trim=9mm 14cm 14mm 16cm, clip=true]{fir0.png}} \end{figure} \end{frame} @@ -56,7 +56,7 @@ \frametitle{Synthesized Output} \vspace{-0.8em} \begin{figure} - \centerline{\includegraphics[width=\paperwidth,trim=9mm 4cm 16.5cm 4cm, clip=true]{fir1.png}} + \centerline{\includegraphics[width=\paperwidth,trim=9mm 15cm 16.5cm 11cm, clip=true]{fir1.png}} \end{figure} \end{frame} @@ -64,6 +64,6 @@ \frametitle{Synthesized Output} \vspace{-0.8em} \begin{figure} - \centerline{\includegraphics[width=\paperwidth,trim=3cm 4cm 4cm 4cm, clip=true]{fir2.png}} + \centerline{\includegraphics[width=\paperwidth,trim=3cm 13cm 4cm 11cm, clip=true]{fir2.png}} \end{figure} \end{frame} \ No newline at end of file diff --git a/christiaan/reductioncircuit.lhs b/christiaan/reductioncircuit.lhs index be3c2d6..a41dbf6 100644 --- a/christiaan/reductioncircuit.lhs +++ b/christiaan/reductioncircuit.lhs @@ -3,14 +3,14 @@ \frame{ \frametitle{Too Restrictive?} \begin{itemize} - \item Is CλasH too restrictive given the fact that a designer can currently not define his own vector transformations, or recursive functions for that matter? + \item Is \clash{} too restrictive given the fact that a designer can currently not define his own vector transformations, or recursive functions for that matter? \end{itemize} } \frame{ \frametitle{Too Restrictive?} \begin{itemize} - \item There is certainly room to increase expressivity. But we can already describe non-trivial design in CλasH. + \item There is certainly room to increase expressivity. But we can already describe non-trivial design in \clash{}. \item Example: Reduction circuit \end{itemize} } @@ -95,7 +95,7 @@ fifo :: (State (Fifo {..})) (inp, shift) = \item Map all vectors to RAMs: \begin{itemize} \item Store length separately, extra logic - \item What happens if size exceeds size of 1 blockRAM? + \item What happens if size of the vector exceeds size of the size of the RAM? \end{itemize} \item Translate to (shift/circular) Buffers \begin{itemize} diff --git a/fir0.png b/fir0.png index 71782b8..43b184d 100644 Binary files a/fir0.png and b/fir0.png differ diff --git a/fir2.png b/fir2.png index 8541aba..7af7f76 100644 Binary files a/fir2.png and b/fir2.png differ