X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fdsd-paper.git;a=blobdiff_plain;f=c%CE%BBash.lhs;h=05e46316144c256aa0e8b2958c900639242640bc;hp=59f529ad461d1155ad630af3905257b0175780e3;hb=bf276de4e3d73a5e155118b4e018922d341c4c7e;hpb=65363f98c6333631868a58c2756ba53614c59cc6

diff --git "a/c\316\273ash.lhs" "b/c\316\273ash.lhs"
index 59f529a..05e4631 100644
--- "a/c\316\273ash.lhs"
+++ "b/c\316\273ash.lhs"
@@ -65,6 +65,7 @@
 %
 
 \documentclass[conference,pdf,a4paper,10pt,final,twoside,twocolumn]{IEEEtran}
+\IEEEoverridecommandlockouts
 % Add the compsoc option for Computer Society conferences.
 %
 % If IEEEtran.cls has not been installed into the LaTeX system files,
@@ -398,7 +399,9 @@
 \IEEEauthorblockA{%Computer Architecture for Embedded Systems (CAES)\\ 
 Department of EEMCS, University of Twente\\
 P.O. Box 217, 7500 AE, Enschede, The Netherlands\\
-c.p.r.baaij@@utwente.nl, matthijs@@stdin.nl, j.kuper@@utwente.nl}}
+c.p.r.baaij@@utwente.nl, matthijs@@stdin.nl, j.kuper@@utwente.nl}
+% \thanks{Supported through FP7 project: S(o)OS (248465)}
+}
 % \and
 % \IEEEauthorblockN{Homer Simpson}
 % \IEEEauthorblockA{Twentieth Century Fox\\
@@ -1192,12 +1195,11 @@ the vectors of the \acro{FIR} code to a length of 4, is depicted in
 \subsection{Higher order CPU}
 
 \begin{code}
-fu op inputs (addr1, addr2) (State out) =
-  (State out', out)
+fu op inputs (addr1, addr2) = regIn
   where
-    in1  = inputs!addr1
-    in2  = inputs!addr2
-    out' = op in1 in2
+    in1     = inputs!addr1
+    in2     = inputs!addr2
+    regIn   = op in1 in2
 \end{code}
 
 \begin{code}
@@ -1205,14 +1207,13 @@ cpu :: Word -> [(Index 6, Index 6) | 4]
   -> State [Word | 4] -> (State [Word | 4], Word)
 cpu input addrs (State fuss) = (State fuss', out)
   where
-    fures =   [ fu const  inputs (addrs!0) (fuss!0)
+    fuss' =   [ fu const  inputs (addrs!0) (fuss!0)
               , fu (+)    inputs (addrs!1) (fuss!1)
               , fu (-)    inputs (addrs!2) (fuss!2)
               , fu (*)    inputs (addrs!3) (fuss!3)
               ]
-    (fuss', outputs)  = unzip fures
-    inputs            = 0 +> (1 +> (input +> outputs))
-    out               = head outputs
+    inputs    = 0 +> (1 +> (input +> fuss))
+    out       = head fuss
 \end{code}
 
 \section{Related work}
@@ -1274,11 +1275,7 @@ mentioned in this section.
 The merits of polymorphic typing, combined with higher-order functions, are 
 now also recognized in the `main-stream' hardware description languages, 
 exemplified by the new \VHDL-2008 standard~\cite{VHDL2008}. \VHDL-2008 support 
-for generics has been extended to types, allowing a developer to describe 
-polymorphic components. Note that those types still require an explicit 
-generic map, whereas types can be automatically inferred in \CLaSH. There are 
-also no (generally available) \VHDL\ synthesis tools that currently support 
-the \VHDL-2008 standard, and thus the synthesis of polymorphic types.
+for generics has been extended to types and subprograms, allowing a developer to describe components with polymorphic ports and function-valued arguments. Note that the types and subprograms still require an explicit generic map, whereas types can be automatically inferred, and function-values can be automatically propagated by the \CLaSH\ compiler. There are also no (generally available) \VHDL\ synthesis tools that currently support the \VHDL-2008 standard, and thus the synthesis of polymorphic types and function-valued arguments.
 
 % Wired~\cite{Wired},, T-Ruby~\cite{T-Ruby}, Hydra~\cite{Hydra}. 
 %