Update introduction to include jan's comments

[matthijs/master-project/dsd-paper.git] / clash.bib

diff --git a/clash.bib b/clash.bib
index 6df0a8609745c8005652ab6b495536638b99c881..f3aeaa5fd49035bf74259dcbc94d5d2d96f389ba 100644 (file)
--- a/clash.bib
+++ b/clash.bib
@@ -50,6 +50,48 @@
   timestamp = {2010.01.20}
 }
 
   timestamp = {2010.01.20}
 }
 

+@INPROCEEDINGS{reductioncircuit,
+  author = {M. E. T. Gerards and J. Kuper and A. B. J. Kokkeler and E. Molenkamp},
+  title = {Streaming Reduction Circuit},
+  booktitle = {Proceedings of the 12th EUROMICRO Conference on Digital System Design,
+       Architectures, Methods and Tools, Patras, Greece},
+  year = {2009},
+  pages = {287--292},
+  address = {Los Alamitos},
+  month = {August},
+  publisher = {IEEE Computer Society Press},
+  abstract = {Reduction circuits are used to reduce rows of ?oating point values
+       to single values. Binary ?oating point operators often have deep
+       pipelines, which may cause hazards when many consecutive rows have
+       to be reduced. We present an algorithm by which any number of consecutive
+       rows of arbitrary lengths can be reduced by a pipelined commutative
+       and associative binary operator in an efficient manner. The algorithm
+       is simple to implement, has a low latency, produces results in-order,
+       and requires only small buffers. Besides, it uses only a single pipeline
+       for the involved operation. The complexity of the algorithm depends
+       on the depth of the pipeline, not on the length of the input rows.
+       In this paper we discuss an implementation of this algorithm and
+       we prove its correctness.},
+  eprintid = {17041},
+  event_dates = {27-29 Aug 2009},
+  event_type = {Conference},
+  howpublished = {http://eprints.eemcs.utwente.nl/17041/},
+  id_number = {10.1109/DSD.2009.141},
+  international = {Yes},
+  isbn_13 = {978-0-7695-3782-5},
+  ispublished = {Published},
+  location = {Patras, Greece},
+  num_pages = {6},
+  official_url = {http://dx.doi.org/10.1109/DSD.2009.141},
+  owner = {baaijcpr},
+  pres_types = {Talk},
+  refereed = {Yes},
+  research_groups = {EWI-CAES: Computer Architecture for Embedded Systems},
+  research_programs = {CTIT-WiSe: Wireless and Sensor Systems},
+  research_projects = {EASY: Embedded Adaptive Streaming sYstems},
+  timestamp = {2010.02.26}
+}
+

 @ARTICLE{reFLect,
   author = {Grundy,Jim and Melham,Tom and O'Leary,John},
   title = {{A reflective functional language for hardware design and theorem
 @ARTICLE{reFLect,
   author = {Grundy,Jim and Melham,Tom and O'Leary,John},
   title = {{A reflective functional language for hardware design and theorem