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Update figure of higher-order ALU, and fix some miner spelling mistakes
[matthijs/master-project/dsd-paper.git]
/
cλash.lhs
diff --git
a/cλash.lhs
b/cλash.lhs
index 3f8507803f854344791797d11fdfa051309a9199..e4a570ed3354d9f8b9af55ab5a34034255f4b3bb 100644
(file)
--- a/
cλash.lhs
+++ b/
cλash.lhs
@@
-1456,7
+1456,7
@@
cpu (State s) input addrs opc = (State s', out)
, fu mul inputs (addrs!3)
]
inputs = 0 +> (1 +> (input +> s))
- out =
head s'
+ out =
last s
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}