% *** PDF, URL AND HYPERLINK PACKAGES ***
%
-%\usepackage{url}
+\usepackage{url}
% url.sty was written by Donald Arseneau. It provides better support for
% handling and breaking URLs. url.sty is already installed on most LaTeX
% systems. The latest version can be obtained at:
Department of EEMCS, University of Twente\\
P.O. Box 217, 7500 AE, Enschede, The Netherlands\\
c.p.r.baaij@@utwente.nl, matthijs@@stdin.nl, j.kuper@@utwente.nl}
-% \thanks{Supported through the FP7 project: S(o)OS (248465)}
+\thanks{Supported through the FP7 project: S(o)OS (248465)}
}
% \and
% \IEEEauthorblockN{Homer Simpson}
Circuit descriptions can be translated to synthesizable VHDL using the
prototype \CLaSH\ compiler. As the circuit descriptions, simulation code, and
-test input are also valid Haskell, complete simulations can be compiled as an
-executable binary by a Haskell compiler allowing high-speed simulation and
-analysis.
+test input are also valid Haskell, complete simulations can be done by a
+Haskell compiler allowing high-speed simulation and analysis.
% \CLaSH\ supports stateful descriptions by explicitly making the current
% state an argument of the function, and the updated state part of the result.
\IEEEpeerreviewmaketitle
\section{Introduction}
-Hardware description languages (\acrop{HDL}) have allowed the productivity of
-hardware engineers to keep pace with the development of chip technology.
-Traditional \acrop{HDL}, like \VHDL~\cite{VHDL2008} and
-Verilog~\cite{Verilog}, allowed an engineer to describe circuits using a
-`programming' language. These standard languages are very good at describing
-detailed hardware properties such as timing behavior, but are generally
-cumbersome in expressing higher-level abstractions. In an attempt to raise the
-abstraction level of the descriptions, a great number of approaches based on
-functional languages has been proposed \cite{Cardelli1981,muFP,DAISY,
-T-Ruby,HML2,Hydra,Hawk1,Lava,Wired,ForSyDe1,reFLect}. The idea of using
-functional languages for hardware descriptions started in the early 1980s
-\cite{Cardelli1981,muFP,DAISY}, a time which also saw the birth of the
-currently popular \acrop{HDL}, such as \VHDL. Functional
-languages are especially well suited to describe hardware because
-combinational circuits can be directly modeled as mathematical functions and
-functional languages are very good at describing and composing these
-functions.
+Hardware description languages (\acrop{HDL}) have not allowed the productivity
+of hardware engineers to keep pace with the development of chip technology.
+While traditional \acrop{HDL}, like \VHDL~\cite{VHDL2008} and
+Verilog~\cite{Verilog}, are very good at describing detailed hardware
+properties such as timing behavior, they are generally cumbersome in
+expressing the higher-level abstractions needed for today's large and complex
+circuit designs. In an attempt to raise the abstraction level of the
+descriptions, a great number of approaches based on functional languages has
+been proposed \cite{Cardelli1981,muFP,DAISY,T-Ruby,HML2,Hydra,Hawk1,Lava,
+Wired,ForSyDe1,reFLect}. The idea of using functional languages for hardware
+descriptions started in the early 1980s \cite{Cardelli1981,muFP,DAISY}, a
+time which also saw the birth of the currently popular \acrop{HDL}, such as
+\VHDL. Functional languages are especially well suited to describe hardware
+because combinational circuits can be directly modeled as mathematical
+functions and functional languages are very good at describing and composing
+these functions.
In an attempt to ease the prototyping process of the language, such as
-creating all the required tooling, like parsers and type-checkers, many
+creating all the required tooling like parsers and type-checkers, many
functional \acrop{HDL} \cite{Hydra,Hawk1,Lava,Wired} are embedded as a domain
specific language (\acro{DSL}) within the functional language Haskell
\cite{Haskell}. This means that a developer is given a library of Haskell
\acro{DSL}. The primitive functions used to describe a circuit do not actually
process any signals, they instead compose a large domain-specific graph
(which is usually hidden from the designer). This graph is then further
-processed by an embedded circuit compiler which can perform for example
-simulation or synthesis. As Haskell's choice elements (\hs{case}-expressions,
-pattern-matching etc.) are evaluated at the time the domain-specific graph is
+processed by an embedded circuit compiler which can perform e.g. simulation or
+synthesis. As Haskell's choice elements (\hs{case}-expressions,
+pattern-matching, etc.) are evaluated at the time the domain-specific graph is
being build, they are no longer visible to the embedded compiler that
processes the datatype. Consequently, it is impossible to capture Haskell's
choice elements within a circuit description when taking the embedded language
approach. This does not mean that circuits specified in an embedded language
can not contain choice, just that choice elements only exists as functions,
-e.g. a multiplexer function, and not as language elements.
+e.g. a multiplexer function, and not as syntactic elements of the language
+itself.
The approach taken in this research is to use (a subset of) the Haskell
language \emph{itself} for the purpose of describing hardware. By taking this
approach, this research \emph{can} capture certain language constructs, like
all of Haskell's choice elements, within circuit descriptions. The more
-advanced features of Haskel, such as polymorphic typing and higher-order
-function, are also supported.
+advanced features of Haskell, such as polymorphic typing and higher-order
+functions, are also supported.
% supporting polymorphism, higher-order functions and such an extensive array
% of choice-elements, combined with a very concise way of specifying circuits
% Haskell Compiler (\GHC)~\cite{ghc}.
Where descriptions in a conventional \acro{HDL} have an explicit clock for the
-purposes state and synchronicity, the clock is implicit for the descriptions and research presented in this paper. A circuit designer describes the behavior of the hardware between clock cycles. Many functional \acrop{HDL} model signals as a stream of all values over time; state is then modeled as a delay on this stream of values. Descriptions presented in this research make the current state an additional input and the updated state a part of their output. This abstraction of state and time limits the descriptions to synchronous hardware, there is however room within the language to eventually add a different abstraction mechanism that will allow for the modeling of asynchronous systems.
-
-Like the traditional \acrop{HDL}, descriptions made in a functional \acro{HDL}
-must eventually be converted into a netlist. This research also features a
-prototype translator, which has the same name as the language:
-\CLaSH\footnote{\CLaSHtiny: \acrotiny{CAES} Language for Synchronous Hardware}
-(pronounced: clash). This compiler converts the Haskell code to equivalently
-behaving synthesizable \VHDL\ code, ready to be converted to an actual netlist
-format by an (optimizing) \VHDL\ synthesis tool.
-
-Besides simple circuits such as variants of both the \acro{FIR} filter and
-the higher-order \acro{CPU} shown in \Cref{sec:usecases}, the \CLaSH\ compiler
-has also been able to translate non-trivial functional descriptions such as a
-streaming reduction circuit~\cite{reductioncircuit} for floating point
-numbers.
+purposes state and synchronicity, the clock is implicit for the descriptions
+and research presented in this paper. A circuit designer describes the
+behavior of the hardware between clock cycles. Many functional \acrop{HDL}
+model signals as a stream of all values over time; state is then modeled as a
+delay on this stream of values. Descriptions presented in this research make
+the current state an additional input and the updated state a part of their
+output. This abstraction of state and time limits the descriptions to
+synchronous hardware, there is however room within the language to eventually
+add a different abstraction mechanism that will allow for the modeling of
+asynchronous systems.
+
+Likewise as with the traditional \acrop{HDL}, descriptions made in a functional \acro{HDL} must eventually be converted into a netlist. This research also features a prototype compiler, which has the same name as the language: \CLaSH\footnote{\CLaSHtiny: \acrotiny{CAES} Language for Synchronous Hardware, where \acrotiny{CAES} is the acronyom of our chair.} (pronounced: clash). This compiler converts the Haskell code to equivalently behaving synthesizable \VHDL\ code, ready to be converted to an actual netlist format by an (optimizing) \VHDL\ synthesis tool.
To the best knowledge of the authors, \CLaSH\ is the only (functional)
\acro{HDL} that allows circuit specification to be written in a very concise
way and at the same time support such advanced features as polymorphic typing,
-higher order functions and pattern matching.
+user-defined higher-order functions and pattern matching.
\section{Hardware description in Haskell}
-The following section describes the basic language elements of \CLaSH\ and the
+This section describes the basic language elements of \CLaSH\ and the
extensiveness of the support of these elements within the \CLaSH\ compiler. In
various subsections, the relation between the language elements and their
eventual netlist representation is also highlighted.
% to understand and possibly hand-optimize the resulting \VHDL\ output of
% the \CLaSH\ compiler.
- The short example (\ref{lst:code1}) seen below gives a demonstration of
+ The short example below (\ref{code:mac}) gives a demonstration of
the conciseness that can be achieved with \CLaSH\ when compared with
other (more traditional) \acrop{HDL}. The example is a combinational
multiply-accumulate circuit that works for \emph{any} word length (this
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code1}
+ \label{code:mac}
\end{example}
\end{minipage}
\end{figure}
The use of a composite result value is demonstrated in the next example
- (\ref{lst:code2}), where the multiply-accumulate circuit not only returns
- the accumulation result, but also the intermediate multiplication result.
- Its corresponding netlist can be seen in \Cref{img:mac-comb-composite}.
+ (\ref{code:mac-composite}), where the multiply-accumulate circuit not only
+ returns the accumulation result, but also the intermediate multiplication
+ result (see \Cref{img:mac-comb-composite}, where the double arrow suggests
+ the composite output).
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code2}
+ \label{code:mac-composite}
\end{example}
\end{minipage}
\vspace{-1.5em}
\hs{case} expressions). When transforming a \CLaSH\ description to a
netlist, a \hs{case} expression is translated to a multiplexer. The
control value of the \hs{case} expression is fed into a number of
- comparators and their combined output forms the selection port of the
+ comparators, and their combined output forms the selection port of the
multiplexer. The result of each alternative in the \hs{case} expression is
linked to the corresponding input port of the multiplexer.
% A \hs{case} expression can in turn simply be translated to a conditional
% sum two values when they are equal or non-equal (depending on the given
% predicate, the \hs{pred} variable) and return 0 otherwise.
- An code example (\ref{lst:code3}) that uses a \hs{case} expression and
+ A code example (\ref{code:counter1}) that uses a \hs{case} expression and
\hs{if-then-else} expressions is shown below. The function counts up or
- down depending on the \hs{direction} variable, and has a \hs{wrap}
+ down depending on the \hs{direction} variable, and has a \hs{bound}
variable that determines both the upper bound and wrap-around point of the
counter. The \hs{direction} variable is of the following, user-defined,
enumeration datatype:
The naive netlist corresponding to this example is depicted in
\Cref{img:counter}. Note that the \hs{direction} variable is only
compared to \hs{Up}, as an inequality immediately implies that
- \hs{direction} is \hs{Down}.
+ \hs{direction} is \hs{Down} (as derived by the compiler).
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\begin{code}
- counter direction wrap x = case direction of
- Up -> if x < wrap then
- x + 1 else
+ counter bound direction x = case direction of
+ Up -> if x < bound then
+ x + 1 else
0
- Down -> if x > 0 then
- x - 1 else
- wrap
+ Down -> if x > 0 then
+ x - 1 else
+ bound
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code3}
+ \label{code:counter1}
\end{example}
\end{minipage}
clause if the guard evaluates to false. Like \hs{if-then-else}
expressions, pattern matching and guards have a (straightforward)
translation to \hs{case} expressions and can as such be mapped to
- multiplexers. A second version (\ref{lst:code5}) of the earlier example,
- now using both pattern matching and guards, can be seen below. The guard
- is the expression that follows the vertical bar (\hs{|}) and precedes the
- assignment operator (\hs{=}). The \hs{otherwise} guards always evaluate to
- \hs{true}.
+ multiplexers. A second version (\ref{code:counter2}) of the earlier
+ example, now using both pattern matching and guards, can be seen below.
+ The guard is the expression that follows the vertical bar (\hs{|}) and
+ precedes the assignment operator (\hs{=}). The \hs{otherwise} guards
+ always evaluate to \hs{true}.
- The version using pattern matching and guards corresponds to the same
- naive netlist representation (\Cref{img:counter}) as the earlier example.
+ The second version corresponds to the same naive netlist representation
+ (\Cref{img:counter}) as the earlier example.
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\begin{code}
- counter Up wrap x | x < wrap = x + 1
- | otherwise = 0
- counter Down wrap x | x > 0 = x - 1
- | otherwise = wrap
+ counter bound Up x | x < bound = x + 1
+ | otherwise = 0
+
+ counter bound Down x | x > 0 = x - 1
+ | otherwise = bound
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code5}
+ \label{code:counter2}
\end{example}
\end{minipage}
\subsection{Types}
Haskell is a statically-typed language, meaning that the type of a
- variable or function is determined at compile-time. Not all of Haskell's
- typing constructs have a clear translation to hardware, this section will
- therefore only deal with the types that do have a clear correspondence
- to hardware. The translatable types are divided into two categories:
- \emph{built-in} types and \emph{user-defined} types. Built-in types are
- those types for which a fixed translation is defined within the \CLaSH\
- compiler. The \CLaSH\ compiler has generic translation rules to
+ variable or function is determined at compile-time. Not all of
+ Haskell's typing constructs have a clear translation to hardware, this
+ section therefor only deals with the types that do have a clear
+ correspondence to hardware. The translatable types are divided into two
+ categories: \emph{built-in} types and \emph{user-defined} types. Built-in
+ types are those types for which a fixed translation is defined within the
+ \CLaSH\ compiler. The \CLaSH\ compiler has generic translation rules to
translate the user-defined types, which are described later on.
The \CLaSH\ compiler is able to infer unspecified (polymorphic) types,
meaning that a developer does not have to annotate every function with a
- type signature. % (even if it is good practice to do so).
- Given that the top-level entity of a circuit design is annotated with
- concrete/monomorphic types, the \CLaSH\ compiler can specialize
- polymorphic functions to functions with concrete types.
+ type signature. Given that the top-level entity of a circuit design is
+ annotated with specific types, the \CLaSH\ compiler can specialize
+ polymorphic functions to functions with specific types.
% Translation of two most basic functional concepts has been
% discussed: function application and choice. Before looking further
% type (where a value of \hs{True} corresponds to a value of
% \hs{High}).
Supporting the Bool type is required in order to support the
- \hs{if-then-else} expression, which requires a \hs{Bool} value for
- the condition.
+ \hs{if-then-else} expression.
\item[\bf{Signed}, \bf{Unsigned}]
- these are types to represent integers and both are parametrizable in
+ these are types to represent integers, and both are parametrizable in
their size. The overflow behavior of the numeric operators defined for
these types is \emph{wrap-around}.
% , so you can define an unsigned word of 32 bits wide as follows:
% types are translated to the \VHDL\ \texttt{unsigned} and
% \texttt{signed} respectively.
\item[\bf{Vector}]
- this is a vector type that can contain elements of any other type and
- has a static length. The \hs{Vector} type constructor takes two type
- arguments: the length of the vector and the type of the elements
- contained in it. The short-hand notation used for the vector type in
- the rest of paper is: \hs{[a|n]}, where \hs{a} is the element
- type, and \hs{n} is the length of the vector. Note that this is
- a notation used in this paper only, vectors are slightly more
- verbose in real \CLaSH\ descriptions.
+ this type can contain elements of any type and has a static length.
+ The \hs{Vector} type constructor takes two arguments: the length of
+ the vector and the type of the elements contained in it. The
+ short-hand notation used for the vector type in the rest of paper is:
+ \hs{[a|n]}, where \hs{a} is the element type, and \hs{n} is the length
+ of the vector.
+ % Note that this is a notation used in this paper only, vectors are
+ % slightly more verbose in real \CLaSH\ descriptions.
% The state type of an 8 element register bank would then for example
% be:
% vector is translated to a \VHDL\ array type.
\item[\bf{Index}]
the main purpose of the \hs{Index} type is to be used as an index into
- a \hs{Vector}, and has no specified bit-size, but a specified upper
- bound. This means that its range is not limited to powers of two, but
- can be any number. An \hs{Index} only has an upper bound, its lower
- bound is implicitly zero. If a value of this type exceeds either
- bounds, an error will be thrown at \emph{simulation}-time.
+ a \hs{Vector}, and has an integer range from zero to a specified upper
+ bound.
+ % This means that its range is not limited to powers of two, but
+ % can be any number.
+ If a value of this type exceeds either bounds, an error will be thrown
+ during simulation.
% \comment{TODO: Perhaps remove this example?} To define an index for
% the 8 element vector above, we would do:
% Haskell. As it is currently unclear how these advanced type constructs
% correspond to hardware, they are for now unsupported by the \CLaSH\
% compiler.
- A completely new type is introduced by an algebraic datatype declaration
- which is defined using the \hs{data} keyword. Type synonyms can be
- introduced using the \hs{type} keyword.
+ A designer may define a completely new type by an algebraic datatype
+ declaration using the \hs{data} keyword. Type synonyms can be introduced
+ using the \hs{type} keyword.
% Only an algebraic datatype declaration actually introduces a
% completely new type. Type synonyms and type renaming only define new
% names for existing types, where synonyms are completely interchangeable
Type synonyms do not need any particular translation, as a synonym will
just use the same representation as the original type.
- For algebraic types, we can make the following distinctions:
+ Algebraic datatypes can be categorized as follows:
\begin{xlist}
\item[\bf{Single constructor}]
- Algebraic datatypes with a single constructor with one or more
- fields allow values to be packed together in a record-like structure.
- Haskell's built-in tuple types are also defined as single constructor
- algebraic types (using a bit of syntactic sugar). An example of a
- single constructor type with multiple fields is the following pair of
+ datatypes with a single constructor with one or more fields allow
+ values to be packed together in a record-like structure. Haskell's
+ built-in tuple types are also defined as single constructor algebraic
+ types (using a bit of syntactic sugar). An example of a single
+ constructor type with multiple fields is the following pair of
integers:
\begin{code}
data IntPair = IntPair Int Int
\end{code}
% These types are translated to \VHDL\ record types, with one field
% for every field in the constructor.
- \item[\bf{No fields}]
- Algebraic datatypes with multiple constructors, but without any
- fields are essentially enumeration types. Note that Haskell's
- \hs{Bool} type is also defined as an enumeration type, but that there
- is a fixed translation for that type within the \CLaSH\ compiler. An
- example of an enumeration type definition is the definition for a
- traffic light:
+ \item[\bf{Multiple constructors, No fields}]
+ datatypes with multiple constructors, but without any
+ fields are essentially enumeration types.
+ % Note that Haskell's \hs{Bool} type is also defined as an enumeration
+ % type, but that there is a fixed translation for that type within the
+ % \CLaSH\ compiler.
+ An example of an enumeration type definition is:
\begin{code}
data TrafficLight = Red | Orange | Green
\end{code}
% constructors to be translated to the corresponding enumeration
% value.
\item[\bf{Multiple constructors with fields}]
- Algebraic datatypes with multiple constructors, where at least
+ datatypes with multiple constructors, where at least
one of these constructors has one or more fields are currently not
- supported. Additional research is required to allow for the overlap of
- the fields belonging to the different constructors.
+ supported. Additional research is required to optimize the overlap of
+ fields belonging to the different constructors.
\end{xlist}
\subsection{Polymorphism}\label{sec:polymorhpism}
A powerful feature of most (functional) programming languages is
polymorphism, it allows a function to handle values of different data
- types in a uniform way. Haskell supports \emph{parametric
- polymorphism}~\cite{polymorphism}, meaning functions can be written
- without mention of any specific type and can be used transparently with
- any number of new types.
+ types in a uniform way. Haskell supports \emph{parametric polymorphism},
+ meaning that functions can be written without mentioning specific types,
+ and they can be used for arbitrary types.
As an example of a parametric polymorphic function, consider the type of
the following \hs{first} function, which returns the first element of a
first :: (a,b) -> a
\end{code}
- This type is parameterized in both \hs{a} and \hs{b}, which can both
+ This type is parameterized in \hs{a} and \hs{b}, which can both
represent any type at all (as long as that type is supported by the
\CLaSH\ compiler). This means that \hs{first} works for any tuple,
regardless of what elements it contains. This kind of polymorphism is
important role in most higher order functions, as will be shown in the
next section.
- Another type of polymorphism is \emph{ad-hoc
- polymorphism}~\cite{polymorphism}, which refers to polymorphic
- functions which can be applied to arguments of different types, but which
- behave differently depending on the type of the argument to which they are
- applied. In Haskell, ad-hoc polymorphism is achieved through the use of
- \emph{type classes}, where a class definition provides the general
- interface of a function, and class \emph{instances} define the
- functionality for the specific types. An example of such a type class is
- the \hs{Num} class, which contains all of Haskell's numerical operations.
- A designer can make use of this ad-hoc polymorphism by adding a
- \emph{constraint} to a parametrically polymorphic type variable. Such a
- constraint indicates that the type variable can only be instantiated to a
- type whose members supports the overloaded functions associated with the
- type class.
+ % Another type of polymorphism is \emph{ad-hoc
+ % polymorphism}~\cite{polymorphism}, which refers to polymorphic
+ % functions which can be applied to arguments of different types, but
+ % which behave differently depending on the type of the argument to which
+ % they are applied. In Haskell, ad-hoc polymorphism is achieved through
+ % the use of \emph{type classes}, where a class definition provides the
+ % general interface of a function, and class \emph{instances} define the
+ % functionality for the specific types. An example of such a type class is
+ % the \hs{Num} class, which contains all of Haskell's numerical
+ % operations. A designer can make use of this ad-hoc polymorphism by
+ % adding a \emph{constraint} to a parametrically polymorphic type
+ % variable. Such a constraint indicates that the type variable can only be
+ % instantiated to a type whose members supports the overloaded functions
+ % associated with the type class.
+
+ Another type of polymorphism is \emph{ad-hoc polymorphism}, which refers
+ to function that can be applied to arguments of a limited set to types.
+ Furthermore, how such functions work may depend on the type of their
+ arguments. For example, addition only works for numeric types, and it
+ works differently for e.g. integers and complex numbers.
+
+ In Haskell, ad-hoc polymorphism is achieved through the use of \emph{type
+ classes}, where a class definition provides the general interface of a
+ function, and class \emph{instances} define the functionality for the
+ specific types. For example, all numeric operators are gathered in the
+ \hs{Num} class, so every type that wants to use those operators must be
+ made an instance of \hs{Num}.
+
+ By prefixing a type signature with class constraints, the constrained type
+ parameters are forced to belong to that type class. For example, the
+ arguments of the \hs{add} function must belong to the \hs{Num} type class
+ because the \hs{add} function adds them with the (+) operator:
- An example of a type signature that includes such a constraint if the
- signature of the \hs{sum} function, which sums the values in a vector:
\begin{code}
- sum :: Num a => [a|n] -> a
+ add :: Num a => a -> a -> a
+ add a b = a + b
\end{code}
-
- This type is again parameterized by \hs{a}, but it can only contain
- types that are \emph{instances} of the \emph{type class} \hs{Num}, so that
- the compiler knows that the addition (+) operator is defined for that
- type.
- A place where class constraints also play a role is in the size and range
- parameters of the \hs{Vector} and numeric types. The reason being that
- these parameters have to be limited to types that can represent
- \emph{natural} numbers. This constraint will also be reflected in any of
- the functions that work these types. The complete type of for example the
- \hs{Vector} type is:
- \begin{code}
- Natural n => Vector n a
- \end{code}
+ % An example of a type signature that includes such a constraint if the
+ % signature of the \hs{sum} function, which sums the values in a vector:
+ % \begin{code}
+ % sum :: Num a => [a|n] -> a
+ % \end{code}
+ %
+ % This type is again parameterized by \hs{a}, but it can only contain
+ % types that are \emph{instances} of the \emph{type class} \hs{Num}, so
+ % that the compiler knows that the addition (+) operator is defined for
+ % that type.
+
+ % A place where class constraints also play a role is in the size and
+ % range parameters of the \hs{Vector} and numeric types. The reason being
+ % that these parameters have to be limited to types that can represent
+ % \emph{natural} numbers. The complete type of for example the \hs{Vector}
+ % type is:
+ % \begin{code}
+ % Natural n => Vector n a
+ % \end{code}
% \CLaSH's built-in numerical types are also instances of the \hs{Num}
% class.
% so we can use the addition operator (and thus the \hs{sum}
% function) with \hs{Signed} as well as with \hs{Unsigned}.
- \CLaSH\ supports both parametric polymorphism and ad-hoc polymorphism. Any
- function defined can have any number of unconstrained type parameters. A
- developer can also specify his own type classes and corresponding
+ \CLaSH\ supports both parametric polymorphism and ad-hoc polymorphism. A
+ circuit designer can specify his own type classes and corresponding
instances. The \CLaSH\ compiler will infer the type of every polymorphic
argument depending on how the function is applied. There is however one
constraint: the top level function that is being translated can not have
- any polymorphic arguments. The arguments of the top-level can not be
- polymorphic as the function is never applied and consequently there is no
- way to determine the actual types for the type parameters.
+ polymorphic arguments. The arguments of the top-level can not be
+ polymorphic as there is no way to infer the \emph{specific} types of the
+ arguments.
With regard to the built-in types, it should be noted that members of
some of the standard Haskell type classes are supported as built-in
functions. These include: the numerial operators of \hs{Num}, the equality
- operators of \hs{Eq}, and the comparison/order operators of \hs{Ord}.
+ operators of \hs{Eq}, and the comparison (order) operators of \hs{Ord}.
\subsection{Higher-order functions \& values}
Another powerful abstraction mechanism in functional languages, is
- the concept of \emph{functions as a first class value}, also called
- \emph{higher-order functions}. This allows a function to be treated as a
- value and be passed around, even as the argument of another
+ the concept of \emph{functions as a first class value} and
+ \emph{higher-order functions}. These concepts allows a function to be
+ treated as a value and be passed around, even as the argument of another
function. The following example should clarify this concept:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
%format not = "\mathit{not}"
\begin{code}
- negateVector xs = map not xs
+ negate{-"\!\!\!"-}Vector xs = map not xs
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code6}
+ \label{code:negatevector}
\end{example}
\end{minipage}
- The code above defines the \hs{negateVector} function, which takes a
- vector of booleans, \hs{xs}, and returns a vector where all the values are
- negated. It achieves this by calling the \hs{map} function, and passing it
- \emph{another function}, boolean negation, and the vector of booleans,
- \hs{xs}. The \hs{map} function applies the negation function to all the
- elements in the vector.
+ The code above defines the \hs{negate{-"\!\!\!"-}Vector} function, which
+ takes a vector of booleans, \hs{xs}, and returns a vector where all the
+ values are negated. It achieves this by calling the \hs{map} function, and
+ passing it \emph{another function}, boolean negation, and the vector of
+ booleans, \hs{xs}. The \hs{map} function applies the negation function to
+ all the elements in the vector.
The \hs{map} function is called a higher-order function, since it takes
another function as an argument. Also note that \hs{map} is again a
signature belonging to \hs{map}:
\begin{code}
- map :: Natural n => (a -> b) -> [a|n] -> [b|n]
+ map :: (a -> b) -> [a|n] -> [b|n]
\end{code}
- So far, only functions have been used as higher-order values. In
- Haskell, there are two more ways to obtain a function-typed value:
+ In Haskell, there are two more ways to obtain a function-typed value:
partial application and lambda abstraction. Partial application
means that a function that takes multiple arguments can be applied
to a single argument, and the result will again be a function (but
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code7}
+ \label{code:partialapplication}
\end{example}
\end{minipage}
Here, the expression \hs{(add 1)} is the partial application of the
addition function to the value \hs{1}, which is again a function that
- adds one to its (next) argument. A lambda expression allows one to
- introduce an anonymous function in any expression. Consider the following
- expression, which again adds one to every element of a vector:
+ adds one to its (next) argument.
+
+ A lambda expression allows one to introduce an anonymous function in any
+ expression. Consider the following expression, which again adds one to
+ every element of a vector:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code8}
+ \label{code:lambdaexpression}
\end{example}
\end{minipage}
Finally, not only built-in functions can have higher order arguments (such
as the \hs{map} function), but any function defined in \CLaSH\ may have
- functions as arguments. This allows the circuit designer to use a
- powerful amount of code reuse. The only exception is again the top-level
- function: if a function-typed argument is not applied with an actual
+ functions as arguments. This allows the circuit designer to apply a
+ large amount of code reuse. The only exception is again the top-level
+ function: if a function-typed argument is not instantiated with an actual
function, no hardware can be generated.
- % \comment{TODO: Describe ALU example (no code)}
+ An example of a common circuit where higher-order functions and partial
+ application lead to a very concise and natural description is a crossbar.
+ The code (\ref{code:crossbar}) for this example can be seen below:
+
+ \hspace{-1.7em}
+ \begin{minipage}{0.93\linewidth}
+ \begin{code}
+ crossbar inputs selects = map (mux inputs) selects
+ where
+ mux inp x = (inp ! x)
+ \end{code}
+ \end{minipage}
+ \begin{minipage}{0.07\linewidth}
+ \begin{example}
+ \label{code:crossbar}
+ \end{example}
+ \end{minipage}
+
+ The the \hs{crossbar} function selects those values from \hs{inputs} that
+ are indicated by the indexes in the vector \hs{selects}. The crossbar is
+ polymorphic in the width of the input (defined by the length of
+ \hs{inputs}), the width of the output (defined by the length of
+ \hs{selects}), and the signal type (defined by the element type of
+ \hs{inputs}). The type-checker can also automatically infer that
+ \hs{selects} is a vector of \hs{Index} values due to the use of the vector
+ indexing operator (\hs{!}).
\subsection{State}
In a stateful design, the outputs depend on the history of the inputs, or
the state. State is usually stored in registers, which retain their value
- during a clock cycle. As we want to describe more than simple
- combinational designs, \CLaSH\ needs an abstraction mechanism for state.
+ during a clock cycle. As \CLaSH\ has to be able to describe more than
+ plain combinational designs, there is a need for an abstraction mechanism
+ for state.
An important property in Haskell, and in many other functional languages,
is \emph{purity}. A function is said to be \emph{pure} if it satisfies two
% correct for impure functions.
Pure functions are as such a perfect match for combinational circuits,
where the output solely depends on the inputs. When a circuit has state
- however, it can no longer be simply described by a pure function.
+ however, it can no longer be described by a pure function.
% Simply removing the purity property is not a valid option, as the
% language would then lose many of it mathematical properties.
- In \CLaSH\ we deal with the concept of state in pure functions by making
- the current state an additional argument of the function, and the
- updated state part of result. In this sense the descriptions made in
- \CLaSH\ are the combinational parts of a mealy machine.
+ \CLaSH\ deals with the concept of state by making the current state an
+ additional argument of the function, and the updated state part of the
+ result. In this sense the descriptions made in \CLaSH\ are the
+ combinational parts of a mealy machine.
A simple example is adding an accumulator register to the earlier
multiply-accumulate circuit, of which the resulting netlist can be seen in
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code9}
+ \label{code:macstate}
\end{example}
\end{minipage}
- \begin{figure}
- \centerline{\includegraphics{mac-state.svg}}
- \caption{Stateful Multiply-Accumulate}
- \label{img:mac-state}
- \vspace{-1.5em}
- \end{figure}
-
Note that the \hs{macS} function returns both the new state and the value
- of the output port. The \hs{State} keyword indicates which arguments are
+ of the output port. The \hs{State} wrapper indicates which arguments are
part of the current state, and what part of the output is part of the
updated state. This aspect will also be reflected in the type signature of
the function. Abstracting the state of a circuit in this way makes it very
explicit: which variables are part of the state is completely determined
by the type signature. This approach to state is well suited to be used in
combination with the existing code and language features, such as all the
- choice elements, as state values are just normal values. We can simulate
- stateful descriptions using the recursive \hs{run} function:
+ choice elements, as state values are just normal values from Haskell's
+ point of view. Stateful descriptions are simulated using the recursive
+ \hs{run} function:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code10}
+ \label{code:run}
\end{example}
\end{minipage}
and the updated state \hs{s'}. The next iteration of the \hs{run} function
is then called with the updated state, \hs{s'}, and the rest of the
inputs, \hs{inps}. For the time being, and in the context of this paper,
- it is assumed that there is one input per clock cycle. Also note how the
- order of the input, output, and state in the \hs{run} function corresponds
+ it is assumed that there is one input per clock cycle. Note that the order
+ of \hs{s',o,s,i} in the where clause of the \hs{run} functions corresponds
with the order of the input, output and state of the \hs{macS} function
- described earlier.
+ described earlier. Thus, in Haskell the expression \hs{run macS 0 inputs}
+ simulates \hs{macS} on \hs{inputs} starting with the value \hs{0}
+
+ \begin{figure}
+ \centerline{\includegraphics{mac-state.svg}}
+ \caption{Stateful Multiply-Accumulate}
+ \label{img:mac-state}
+ \vspace{-1.5em}
+ \end{figure}
- As the \hs{run} function, the hardware description, and the test
- inputs are also valid Haskell, the complete simulation can be compiled to
- an executable binary by an optimizing Haskell compiler, or executed in an
- Haskell interpreter. Both simulation paths require less effort from a
- circuit designer than first translating the description to \VHDL\ and then
- running a \VHDL\ simulation; it is also very likely that both simulation
- paths are much faster.
+ The complete simulation can be compiled to an executable binary by an
+ optimizing Haskell compiler, or executed in an Haskell interpreter. Both
+ simulation paths require less effort from a circuit designer than first
+ translating the description to \VHDL\ and then running a \VHDL\
+ simulation; it is also very likely that both simulation paths are much
+ faster.
\section{The \CLaSH\ compiler}
An important aspect in this research is the creation of the prototype
% , allowing a designer to actually run a \CLaSH\ design on an \acro{FPGA}.
The Glasgow Haskell Compiler (\GHC)~\cite{ghc} is an open-source Haskell
-compiler that also provides a high level API to most of its internals. The
-availability of this high-level API obviated the need to design many of the
-tedious parts of the prototype compiler, such as the parser, semantics
-checker, and especially the type-checker. These parts together form the
-front-end of the prototype compiler pipeline, as seen in
+compiler that also provides a high level \acro{API} to most of its internals.
+The availability of this high-level \acro{API} obviated the need to design
+many of the tedious parts of the prototype compiler, such as the parser,
+semantics checker, and especially the type-checker. These parts together form
+the front-end of the prototype compiler pipeline, as seen in
\Cref{img:compilerpipeline}.
\begin{figure}
+\vspace{1em}
\centerline{\includegraphics{compilerpipeline.svg}}
\caption{\CLaSHtiny\ compiler pipeline}
\label{img:compilerpipeline}
\end{figure}
The output of the \GHC\ front-end consists of the translation of the original
-Haskell description to \emph{Core}~\cite{Sulzmann2007}, which is a smaller,
-typed, functional language. This \emph{Core} language is relatively easy to
+Haskell description to \emph{Core}~\cite{Sulzmann2007}, which is a small
+typed functional language. This \emph{Core} language is relatively easy to
process compared to the larger Haskell language. A description in \emph{Core}
can still contain elements which have no direct translation to hardware, such
as polymorphic types and function-valued arguments. Such a description needs
The final step in the compiler pipeline is the translation to a \VHDL\
\emph{netlist}, which is a straightforward process due to resemblance of a
-normalized description and a set of concurrent signal assignments. We call the
-end-product of the \CLaSH\ compiler a \VHDL\ \emph{netlist} as the result
-resembles an actual netlist description, and the fact that it is \VHDL\ is
-only an implementation detail; the output could for example also be in
+normalized description and a set of concurrent signal assignments. The
+end-product of the \CLaSH\ compiler is called a \VHDL\ \emph{netlist} as the
+result resembles an actual netlist description, and the fact that it is \VHDL\
+is only an implementation detail; the output could for example also be in
Verilog.
\section{Use cases}
\label{sec:usecases}
\subsection{FIR Filter}
-As an example of a common hardware design where the use of higher-order
-functions leads to a very natural description is a \acro{FIR} filter, which is
-basically the dot-product of two vectors:
+As an example of a common hardware design where the relation between
+functional languages and mathematical functions, combined with the use of
+higher-order functions leads to a very natural description is a \acro{FIR}
+filter:
\begin{equation}
y_t = \sum\nolimits_{i = 0}^{n - 1} {x_{t - i} \cdot h_i }
A \acro{FIR} filter multiplies fixed constants ($h$) with the current
and a few previous input samples ($x$). Each of these multiplications
are summed, to produce the result at time $t$. The equation of a \acro{FIR}
-filter is indeed equivalent to the equation of the dot-product, which is
-shown below:
+filter is equivalent to the equation of the dot-product of two vectors, which
+is shown below:
\begin{equation}
\mathbf{a}\bullet\mathbf{b} = \sum\nolimits_{i = 0}^{n - 1} {a_i \cdot b_i }
\end{equation}
-We can easily and directly implement the equation for the dot-product
-using higher-order functions:
+The equation for the dot-product is easily and directly implemented using
+higher-order functions:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code13}
+ \label{code:dotproduct}
\end{example}
\end{minipage}
% \begin{equation}
% y_t = \sum\nolimits_{i = 0}^{n - 1} {x_i \cdot h_i }
% \end{equation}
-The complete definition of the \acro{FIR} filter in code then becomes:
+The complete definition of the \acro{FIR} filter in \CLaSH\ is:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code14}
+ \label{code:fir}
\end{example}
\end{minipage}
-Where the vector \hs{xs} contains the previous input samples, the vector
+where the vector \hs{xs} contains the previous input samples, the vector
\hs{hs} contains the \acro{FIR} coefficients, and \hs{x} is the current input
sample. The concatenate operator (\hs{+>}) creates a new vector by placing the
current sample (\hs{x}) in front of the previous samples vector (\hs{xs}). The
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code15}
+ \label{code:shiftinto}
\end{example}
\end{minipage}
-Where the \hs{init} function returns all but the last element of a vector.
+where the \hs{init} function returns all but the last element of a vector.
The resulting netlist of a 4-taps \acro{FIR} filter, created by specializing
the vectors of the \acro{FIR} code to a length of 4, is depicted in
\Cref{img:4tapfir}.
\end{figure}
\subsection{Higher-order CPU}
-The following simple \acro{CPU} is an example of user-defined higher order
-functions and pattern matching. The \acro{CPU} consists of four function
-units, of which three have a fixed function and one can perform certain less
-common operations.
-
-The \acro{CPU} contains a number of data sources, represented by the
-horizontal wires in \Cref{img:highordcpu}. These data sources offer the
-previous outputs of each function units, along with the single data input the
-\acro{CPU} has and two fixed initialization values.
-
-Each of the function units has both its operands connected to all data
-sources, and can be programmed to select any data source for either
-operand. In addition, the leftmost function unit has an additional
-opcode input to select the operation it performs. The output of the rightmost
-function unit is also the output of the entire \acro{CPU}.
-
-Looking at the code, the function unit (\hs{fu}) is the most simple. It
-arranges the operand selection for the function unit. Note that it does not
-define the actual operation that takes place inside the function unit,
-but simply accepts the (higher-order) argument \hs{op} which is a function
-of two arguments that defines the operation.
+%format fun x = "\textit{fu}_" x
+In this section discusses a somewhat more serious example in which
+user-defined higher-order function, partial application, lambda expressions,
+and pattern matching are exploited. The example concerns a \acro{CPU} which
+consists of four function unites \hs{fun 0,{-"\ldots"-},fun 3} (see
+\Cref{img:highordcpu}) that each perform some binary operation.
+
+\begin{figure}
+\centerline{\includegraphics{highordcpu.svg}}
+\caption{CPU with higher-order Function Units}
+\label{img:highordcpu}
+\vspace{-1.5em}
+\end{figure}
+
+Every function unit has seven data inputs (of type \hs{Word}), and two address
+inputs (of type \hs{Index 6}) which indicate which data inputs have to be
+chosen as arguments for the the binary operation that the unit performs. These
+data inputs consists of one external input \hs{x}, two fixed initialization
+values (0 and 1), and the previous outputs of the four function units. The
+output of the \acro{CPU} as a whole is the previous output of \hs{fun 3}.
+
+The function units \hs{fun 1, fun 2, fun 3} can perform a fixed binary
+operation, whereas \hs{fun 0} has an additional input for an opcode to choose
+a binary operation out of a few possibilities.
+
+Each function unit outputs its result into a register, i.e., the state of the
+\acro{CPU}. This can can e.g. be defined as follows:
+
+\begin{code}
+type CpuState = State [Word | 4]
+\end{code}
+
+Every function unit can now be defined by the following higher-order function
+\hs{fu}, which takes three arguments: the operation \hs{op} that the function
+unit performs, the seven \hs{inputs}, and the pair \hs{(a1,a2)} of two
+addresses:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\begin{code}
-fu op inputs (addr1, addr2) = regIn
+fu op inputs (a1, a2) = regIn
where
- in1 = inputs!addr1
- in2 = inputs!addr2
- regIn = op in1 in2
+ arg1 = inputs!a1
+ arg2 = inputs!a2
+ regIn = op arg1 arg2
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code16}
+ \label{code:functionunit}
\end{example}
\end{minipage}
-The \hs{multiop} function defines the operation that takes place in the
-leftmost function unit. It is essentially a simple three operation \acro{ALU}
-that makes good use of pattern matching and guards in its description.
-The \hs{shift} function used here shifts its first operand by the number
-of bits indicated in the second operand, the \hs{xor} function produces
-the bitwise xor of its operands.
+Using partial application we now define:
+
+\hspace{-1.7em}
+\begin{minipage}{0.93\linewidth}
+\begin{code}
+fun 1 = fu add
+fun 2 = fu sub
+fun 3 = fu mul
+\end{code}
+\end{minipage}
+\begin{minipage}{0.07\linewidth}
+ \begin{example}
+ \label{code:functionunits1to3}
+ \end{example}
+\end{minipage}
+
+In order to define \hs{fun 0} we first define the type \hs{Opcode} for the
+opcode and the function \hs{multiop} that chooses a specific operation given
+the opcode. We assume that the functions \hs{shifts} (which shifts its first
+operand by the number of bits indicate in the second operand), \hs{xor} (for
+the bitwise \hs{xor}), and (==) (for equality) already exits.
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\begin{code}
data Opcode = Shift | Xor | Equal
-multiop :: Opcode -> Word -> Word -> Word
-multiop Shift a b = shift a b
-multiop Xor a b = xor a b
-multiop Equal a b | a == b = 1
- | otherwise = 0
+multiop Shift = shift
+multiop Xor = xor
+multiop Equal = \a b -> if a == b then 1 else 0
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code17}
+ \label{code:multiop}
\end{example}
\end{minipage}
-The \acro{CPU} function ties everything together. It applies the \hs{fu}
-function four times, to create a different function unit each time. The
-first application is interesting, because it does not just pass a
-function to \hs{fu}, but a partial application of \hs{multiop}. This
-shows how the first function unit effectively gets an extra input,
-compared to the others.
-
-The vector \hs{inputs} is the set of data sources, which is passed to
-each function unit as a set of possible operants. The \acro{CPU} also receives
-a vector of address pairs, which are used by each function unit to select
-their operand.
-% The application of the function units to the \hs{inputs} and
-% \hs{addrs} arguments seems quite repetitive and could be rewritten to use
-% a combination of the \hs{map} and \hs{zipwith} functions instead.
-% However, the prototype compiler does not currently support working with
-% lists of functions, so a more explicit version of the code is given instead.
+Note that the result of \hs{multiop} is a binary function; this is supported
+by \CLaSH. We can now define \hs{fun 0} as a function which takes an opcode as
+additional argument:
\hspace{-1.7em}
\begin{minipage}{0.93\linewidth}
\begin{code}
-type CpuState = State [Word | 4]
+fun 0 c = fu (multiop c)
+\end{code}
+\end{minipage}
+\begin{minipage}{0.07\linewidth}
+ \begin{example}
+ \label{code:functionunit0}
+ \end{example}
+\end{minipage}
+
+Now we come to the definition \hs{cpu} of the full \acro{CPU}. Its type is:
-cpu :: CpuState -> Word -> [(Index 6, Index 6) | 4]
- -> Opcode -> (CpuState, Word)
-cpu (State s) input addrs opc = (State s', out)
+\begin{code}
+cpu :: CpuState
+ -> (Word, Opcode, [(Index 6, Index 6) | 4])
+ -> (CpuState, Word)
+\end{code}
+
+Note that this type fits the requirements of the function \hs{run}. The
+definition of the \hs{cpu} now is:
+
+\hspace{-1.7em}
+\begin{minipage}{0.93\linewidth}
+\begin{code}
+cpu (State s) (x,opc,addrs) = (State s', out)
where
- s' = [ fu (multiop opc) inputs (addrs!0)
- , fu add inputs (addrs!1)
- , fu sub inputs (addrs!2)
- , fu mul inputs (addrs!3)
- ]
- inputs = 0 +> (1 +> (input +> s))
+ inputs = x +> (0 +> (1 +> s))
+ s' = [{-"\;"-}fun 0 opc inputs (addrs!0)
+ ,{-"\;"-}fun 1 inputs (addrs!1)
+ ,{-"\;"-}fun 2 inputs (addrs!2)
+ ,{-"\;"-}fun 3 inputs (addrs!3)
+ ]
out = last s
\end{code}
\end{minipage}
\begin{minipage}{0.07\linewidth}
\begin{example}
- \label{lst:code18}
+ \label{code:cpu}
\end{example}
\end{minipage}
-This is still a simple example, but it could form the basis
-of an actual design, in which the same techniques can be reused.
+While this is still a simple (and maybe not very useful) design, it
+illustrates some possibilities that \CLaSH\ offers and suggests how to write
+actual designs.
+
+% Each of the function units has both its operands connected to all data
+% sources, and can be programmed to select any data source for either
+% operand. In addition, the leftmost function unit has an additional
+% opcode input to select the operation it performs. The previous output of the
+% rightmost function unit is the output of the entire \acro{CPU}.
+%
+% The code of the function unit (\ref{code:functionunit}), which arranges the
+% operand selection for the function unit, is shown below. Note that the actual
+% operation that takes place inside the function unit is supplied as the
+% (higher-order) argument \hs{op}, which is a function that takes two arguments.
+%
+%
+%
+% The \hs{multiop} function (\ref{code:multiop}) defines the operation that takes place in the leftmost function unit. It is essentially a simple three operation \acro{ALU} that makes good use of pattern matching and guards in its description. The \hs{shift} function used here shifts its first operand by the number of bits indicated in the second operand, the \hs{xor} function produces
+% the bitwise xor of its operands.
+%
+%
+% The \acro{CPU} function (\ref{code:cpu}) ties everything together. It applies
+% the function unit (\hs{fu}) to several operations, to create a different
+% function unit each time. The first application is interesting, as it does not
+% just pass a function to \hs{fu}, but a partial application of \hs{multiop}.
+% This demonstrates how one function unit can effectively get extra inputs
+% compared to the others.
+%
+% The vector \hs{inputs} is the set of data sources, which is passed to
+% each function unit as a set of possible operants. The \acro{CPU} also receives
+% a vector of address pairs, which are used by each function unit to select
+% their operand.
+% The application of the function units to the \hs{inputs} and
+% \hs{addrs} arguments seems quite repetitive and could be rewritten to use
+% a combination of the \hs{map} and \hs{zipwith} functions instead.
+% However, the prototype compiler does not currently support working with
+% lists of functions, so a more explicit version of the code is given instead.
+
+% While this is still a simple example, it could form the basis of an actual
+% design, in which the same techniques can be reused.
\section{Related work}
This section describes the features of existing (functional) hardware
\acro{HML}~\cite{HML2} is a hardware modeling language based on the strict
functional language \acro{ML}, and has support for polymorphic types and
higher-order functions. There is no direct simulation support for \acro{HML},
-so a description in \acro{HML} has to be translated to \VHDL\ and that the
+so a description in \acro{HML} has to be translated to \VHDL\ and the
translated description can then be simulated in a \VHDL\ simulator. Certain
aspects of HML, such as higher-order functions are however not supported by
the \VHDL\ translator~\cite{HML3}. The \CLaSH\ compiler on the other hand can
-correctly translate all of the language constructs mentioned in this paper.
-
-\begin{figure}
-\centerline{\includegraphics{highordcpu.svg}}
-\caption{CPU with higher-order Function Units}
-\label{img:highordcpu}
-\vspace{-1.5em}
-\end{figure}
+correctly translate all of its language constructs.
Like the research presented in this paper, many functional hardware
description languages have some sort of foundation in the functional
programming language Haskell. Hawk~\cite{Hawk1} is a hardware modeling
language embedded in Haskell and has sequential environments that make it
-easier to specify stateful computation. Hawk specifications can be simulated;
-to the best knowledge of the authors there is however no support for automated
-circuit synthesis.
+easier to specify stateful computation (by using the \acro{ST} monad). Hawk
+specifications can be simulated; to the best knowledge of the authors there is
+however no support for automated circuit synthesis.
The ForSyDe~\cite{ForSyDe2} system uses Haskell to specify abstract system
models. A designer can model systems using heterogeneous models of
computation, which include continuous time, synchronous and untimed models of
computation. Using so-called domain interfaces a designer can simulate
-electronic systems which have both analog as digital parts. ForSyDe has
+electronic systems which have both analog and digital parts. ForSyDe has
several backends including simulation and automated synthesis, though
automated synthesis is restricted to the synchronous model of computation.
Though ForSyDe offers higher-order functions and polymorphism, ForSyDe's
choice elements are limited to \hs{if} and \hs{case} expressions. ForSyDe's
-explicit conversions, where function have to be wrapped in processes and
+explicit conversions, where functions have to be wrapped in processes and
processes have to be wrapped in systems, combined with the explicit
-instantiations of components, also makes ForSyDe more verbose than \CLaSH.
-
-Lava~\cite{Lava} is a hardware description language, embedded in Haskell, and
-focuses on the structural representation of hardware. Like \CLaSH, Lava has
-support for polymorphic types and higher-order functions. Besides support for
-simulation and circuit synthesis, Lava descriptions can be interfaced with
-formal method tools for formal verification. As discussed in the introduction,
-taking the embedded language approach does not allow for Haskell's choice
-elements to be captured within the circuit descriptions. In this respect
-\CLaSH\ differs from Lava, in that all of Haskell's choice elements, such as
-\hs{case}-expressions and pattern matching, are synthesized to choice elements
-in the eventual circuit. Consequently, descriptions containing rich control
-structures can be specified in a more user-friendly way in \CLaSH\ than possible within Lava, and are hence less error-prone.
+instantiations of components, also makes ForSyDe far more verbose than \CLaSH.
+
+Lava~\cite{Lava,kansaslava} is a hardware description language embedded in
+Haskell which focuses on the structural representation of hardware. Like
+\CLaSH, Lava has support for polymorphic types and higher-order functions.
+Besides support for simulation and circuit synthesis, Lava descriptions can be
+interfaced with formal method tools for formal verification. As discussed in
+the introduction, taking the embedded language approach does not allow for
+Haskell's choice elements to be captured within the circuit descriptions. In
+this respect \CLaSH\ differs from Lava, in that all of Haskell's choice
+elements, such as \hs{case}-expressions and pattern matching, are synthesized
+to choice elements in the eventual circuit. Consequently, descriptions
+containing rich control structures can be specified in a more user-friendly
+way in \CLaSH\ than possible within Lava, and hence are less error-prone.
Bluespec~\cite{Bluespec} is a high-level synthesis language that features
guarded atomic transactions and allows for the automated derivation of control
standard~\cite{VHDL2008}. \VHDL-2008 support for generics has been extended to
types and subprograms, allowing a designer to describe components with
polymorphic ports and function-valued arguments. Note that the types and
-subprograms still require an explicit generic map, whereas types can be
-automatically inferred, and function-values can be automatically propagated
-by the \CLaSH\ compiler. There are also no (generally available) \VHDL\
-synthesis tools that currently support the \VHDL-2008 standard.
+subprograms still require an explicit generic map, while the \CLaSH\ compiler
+automatically infers types, and automatically propagates function-valued
+arguments. There are also no (generally available) \VHDL\ synthesis tools that
+currently support the \VHDL-2008 standard.
% Wired~\cite{Wired},, T-Ruby~\cite{T-Ruby}, Hydra~\cite{Hydra}.
%
\section{Conclusion}
This research demonstrates once more that functional languages are well suited
for hardware descriptions: function applications provide an elegant notation
-for component instantiation. Where this research goes beyond the existing
-(functional) hardware descriptions languages is the inclusion of various
-choice elements, such as pattern matching, that are well suited to describe
-the conditional assignments in control-oriented circuits. Besides being able
-to translate these basic constructs to synthesizable \VHDL, the prototype
-compiler can also correctly translate descriptions that contain both
-polymorphic types and function-valued arguments.
-
-Where recent functional hardware description languages have mostly opted to
-embed themselves in an existing functional language, this research features a
-`true' compiler. As a result there is a clear distinction between compile-time
-and run-time, which allows a myriad of choice constructs to be part of the
-actual circuit description; a feature the embedded hardware description
-languages do not offer.
+for component instantiation. While circuit descriptions made in \CLaSH\ are
+very concise when compared to other (traditional) \acrop{HDL}, their intended
+functionality remains clear. \CLaSH\ goes beyond the existing (functional)
+hardware descriptions languages by including advanced choice elements, such as
+pattern matching and guards, which are well suited to describe the conditional
+assignments in control-oriented circuits. Besides being able to translate
+these basic constructs to synthesizable \VHDL, the prototype compiler can also
+correctly translate descriptions that contain both polymorphic types and
+user-defined higher-order functions.
+
+% Where recent functional hardware description languages have mostly opted to
+% embed themselves in an existing functional language, this research features
+% a `true' compiler. As a result there is a clear distinction between
+% compile-time and run-time, which allows a myriad of choice constructs to be
+% part of the actual circuit description; a feature the embedded hardware
+% description languages do not offer.
+
+Besides simple circuits such as variants of both the \acro{FIR} filter and
+the higher-order \acro{CPU} shown in \Cref{sec:usecases}, the \CLaSH\ compiler
+has also been able to translate non-trivial functional descriptions such as a
+streaming reduction circuit~\cite{reductioncircuit} for floating point
+numbers.
\section{Future Work}
-The choice of describing state explicitly as extra arguments and results can
-be seen as a mixed blessing. Even though the description that use state are
+The choice of describing state explicitly as and extra argument and result can
+be seen as a mixed blessing. Even though descriptions that use state are
usually very clear, one finds that distributing and collecting substate can
-become tedious and even error-prone. Removing the required boilerplate for
-distribution and collection, or finding a more suitable abstraction mechanism
-for state would make \CLaSH\ easier to use.
+become tedious and even error-prone. Automating the required distribution and
+collection, or finding a more suitable abstraction mechanism for state would
+make \CLaSH\ easier to use. Currently, one of the examined approaches to
+suppress state in the specification is by using Haskell's arrow-abstraction.
-The transformations in normalization phase of the prototype compiler were
+The transformations in the normalization phase of the prototype compiler are
developed in an ad-hoc manner, which makes the existence of many desirable
properties unclear. Such properties include whether the complete set of
-transformations will always lead to a normal form or if the normalization
-process always terminates. Though various use cases suggests that these
-properties usually hold, they have not been formally proven. A systematic
-approach to defining the set of transformations allows one to proof that the
-earlier mentioned properties do indeed exist.
+transformations will always lead to a normal form or whether the normalization
+process always terminates. Though extensive use of the compiler suggests that
+these properties usually hold, they have not been formally proven. A
+systematic approach to defining the set of transformations allows one to proof
+that the earlier mentioned properties do indeed hold.
% conference papers do not normally have an appendix
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