Add reference to Haskell and Verilog. Add something about state to introduction

[matthijs/master-project/dsd-paper.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index 50bcf5adadf3af5d9243aae019cf5aaffec67e03..2c4bbc94626d1e4915d21cbd204a65c50c03cfe2 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -4,3 +4,6 @@
 *.fdb_latexmk
 *.log
 *.pdf
+*.bak
+.latexmkrc
+cλash.tex