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265 % replacement for subfigure.sty. However, subfig.sty requires and
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283 % *** FLOAT PACKAGES ***
285 %\usepackage{fixltx2e}
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337 % There should be no need to do such things with IEEEtran.cls V1.6 and later.
338 % (Unless specifically asked to do so by the journal or conference you plan
339 % to submit to, of course. )
342 % correct bad hyphenation here
343 \hyphenation{op-tical net-works semi-conduc-tor}
345 % Macro for certain acronyms in small caps. Doesn't work with the
346 % default font, though (it contains no smallcaps it seems).
347 \def\VHDL{\textsc{VHDL}}
348 \def\GHC{\textsc{GHC}}
349 \def\CLaSH{C$\lambda$aSH}
351 % Macro for pretty printing haskell snippets. Just monospaced for now, perhaps
352 % we'll get something more complex later on.
353 \def\hs#1{\texttt{#1}}
358 % can use linebreaks \\ within to get better formatting as desired
359 \title{\CLaSH: Structural Descriptions \\ of Synchronous Hardware using Haskell}
362 % author names and affiliations
363 % use a multiple column layout for up to three different
365 \author{\IEEEauthorblockN{Christiaan P.R. Baaij, Matthijs Kooijman, Jan Kuper, Marco E.T. Gerards, Bert Molenkamp, Sabih H. Gerez}
366 \IEEEauthorblockA{University of Twente, Department of EEMCS\\
367 P.O. Box 217, 7500 AE, Enschede, The Netherlands\\
368 c.p.r.baaij@utwente.nl, matthijs@stdin.nl}}
370 % \IEEEauthorblockN{Homer Simpson}
371 % \IEEEauthorblockA{Twentieth Century Fox\\
373 % Email: homer@thesimpsons.com}
375 % \IEEEauthorblockN{James Kirk\\ and Montgomery Scott}
376 % \IEEEauthorblockA{Starfleet Academy\\
377 % San Francisco, California 96678-2391\\
378 % Telephone: (800) 555--1212\\
379 % Fax: (888) 555--1212}}
381 % conference papers do not typically use \thanks and this command
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384 % after \documentclass
386 % for over three affiliations, or if they all won't fit within the width
387 % of the page, use this alternative format:
389 %\author{\IEEEauthorblockN{Michael Shell\IEEEauthorrefmark{1},
390 %Homer Simpson\IEEEauthorrefmark{2},
391 %James Kirk\IEEEauthorrefmark{3},
392 %Montgomery Scott\IEEEauthorrefmark{3} and
393 %Eldon Tyrell\IEEEauthorrefmark{4}}
394 %\IEEEauthorblockA{\IEEEauthorrefmark{1}School of Electrical and Computer Engineering\\
395 %Georgia Institute of Technology,
396 %Atlanta, Georgia 30332--0250\\ Email: see http://www.michaelshell.org/contact.html}
397 %\IEEEauthorblockA{\IEEEauthorrefmark{2}Twentieth Century Fox, Springfield, USA\\
398 %Email: homer@thesimpsons.com}
399 %\IEEEauthorblockA{\IEEEauthorrefmark{3}Starfleet Academy, San Francisco, California 96678-2391\\
400 %Telephone: (800) 555--1212, Fax: (888) 555--1212}
401 %\IEEEauthorblockA{\IEEEauthorrefmark{4}Tyrell Inc., 123 Replicant Street, Los Angeles, California 90210--4321}}
406 % use for special paper notices
407 %\IEEEspecialpapernotice{(Invited Paper)}
412 % make the title area
418 The abstract goes here.
420 % IEEEtran.cls defaults to using nonbold math in the Abstract.
421 % This preserves the distinction between vectors and scalars. However,
422 % if the conference you are submitting to favors bold math in the abstract,
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424 % of the abstract to achieve this. Many IEEE journals/conferences frown on
425 % math in the abstract anyway.
432 % For peer review papers, you can put extra information on the cover
434 % \ifCLASSOPTIONpeerreview
435 % \begin{center} \bfseries EDICS Category: 3-BBND \end{center}
438 % For peerreview papers, this IEEEtran command inserts a page break and
439 % creates the second title. It will be ignored for other modes.
440 \IEEEpeerreviewmaketitle
443 \section{Introduction}
444 Hardware description languages have allowed the productivity of hardware engineers to keep pace with the development of chip technology. Standard Hardware description languages, like VHDL and Verilog, allowed an engineer to describe circuits using a programming language. These standard languages are very good at describing detailed hardware properties such as timing behavior, but are generally cumbersome in expressing higher-level abstractions. These languages also tend to have a complex syntax and a lack of formal semantics. To overcome these complexities, and raise the abstraction level, a great number of approaches based on functional languages has been proposed \cite{T-Ruby,Hydra,HML2,Hawk1,Lava,ForSyDe1,Wired,reFLect}. The idea of using functional languages started in the early 1980s \cite{Cardelli1981,muFP,DAISY,FHDL}, a time which also saw the birth of the currently popular hardware description languages such as VHDL.
446 \section{Hardware description in Haskell}
448 \subsection{Function application}
449 The basic syntactic elements of a functional program are functions
450 and function application. These have a single obvious \VHDL\
451 translation: each top level function becomes a hardware component,
452 where each argument is an input port and the result value is the
453 (single) output port. This output port can have a complex type (such
454 as a tuple), so having just a single output port does not create a
457 Each function application in turn becomes component instantiation.
458 Here, the result of each argument expression is assigned to a
459 signal, which is mapped to the corresponding input port. The output
460 port of the function is also mapped to a signal, which is used as
461 the result of the application itself.
463 Since every top level function generates its own component, the
464 hierarchy of of function calls is reflected in the final \VHDL\
465 output as well, creating a hierarchical \VHDL\ description of the
466 hardware. This separation in different components makes the
467 resulting \VHDL\ output easier to read and debug.
469 Example that defines the \texttt{mac} function by applying the
470 \texttt{add} and \texttt{mul} functions to calculate $a * b + c$:
473 mac a b c = add (mul a b) c
478 \subsection{Choices }
479 Although describing components and connections allows describing a
480 lot of hardware designs already, there is an obvious thing missing:
481 choice. We need some way to be able to choose between values based
482 on another value. In Haskell, choice is achieved by \hs{case}
483 expressions, \hs{if} expressions, pattern matching and guards.
485 The easiest of these are of course case expressions (and \hs{if}
486 expressions, which can be very directly translated to \hs{case}
487 expressions). A \hs{case} expression can in turn simply be
488 translated to a conditional assignment in \VHDL, where the
489 conditions use equality comparisons against the constructors in the
490 \hs{case} expressions.
492 A slightly more complex (but very powerful) form of choice is
493 pattern matching. A function can be defined in multiple clauses,
494 where each clause specifies a pattern. When the arguments match the
495 pattern, the corresponding clause will be used.
497 A pattern match (with optional guards) can also be implemented using
498 conditional assignments in \VHDL, where the condition is the logical
499 and of comparison results of each part of the pattern as well as the
502 Contrived example that sums two values when they are equal or
503 non-equal (depending on the predicate given) and returns 0
504 otherwise. This shows three implementations, one using and if
505 expression, one using only case expressions and one using pattern
509 sumif pred a b = if pred == Eq && a == b || pred == Neq && a != b
515 sumif pred a b = case pred of
519 Neq -> case a != b of
525 sumif Eq a b | a == b = a + b
526 sumif Neq a b | a != b = a + b
533 Translation of two most basic functional concepts has been
534 discussed: function application and choice. Before looking further
535 into less obvious concepts like higher-order expressions and
536 polymorphism, the possible types that can be used in hardware
537 descriptions will be discussed.
539 Some way is needed to translate every values used to its hardware
540 equivalents. In particular, this means a hardware equivalent for
541 every \emph{type} used in a hardware description is needed
543 Since most functional languages have a lot of standard types that
544 are hard to translate (integers without a fixed size, lists without
545 a static length, etc.), a number of \quote{built-in} types will be
546 defined first. These types are built-in in the sense that our
547 compiler will have a fixed VHDL type for these. User defined types,
548 on the other hand, will have their hardware type derived directly
549 from their Haskell declaration automatically, according to the rules
552 \subsection{Built-in types}
553 The language currently supports the following built-in types. Of these,
554 only the \hs{Bool} type is supported by Haskell out of the box (the
555 others are defined by the \CLaSH\ package, so they are user-defined types
556 from Haskell's point of view).
560 This is the most basic type available. It is mapped directly onto
561 the \texttt{std\_logic} \VHDL\ type. Mapping this to the
562 \texttt{bit} type might make more sense (since the Haskell version
563 only has two values), but using \texttt{std\_logic} is more standard
564 (and allowed for some experimentation with don't care values)
567 This is the only built-in Haskell type supported and is translated
568 exactly like the Bit type (where a value of \hs{True} corresponds to a
569 value of \hs{High}). Supporting the Bool type is particularly
570 useful to support \hs{if ... then ... else ...} expressions, which
571 always have a \hs{Bool} value for the condition.
573 A \hs{Bool} is translated to a \texttt{std\_logic}, just like \hs{Bit}.
574 \item[\hs{SizedWord}, \hs{SizedInt}]
575 These are types to represent integers. A \hs{SizedWord} is unsigned,
576 while a \hs{SizedInt} is signed. These types are parametrized by a
577 length type, so you can define an unsigned word of 32 bits wide as
581 type Word32 = SizedWord D32
584 Here, a type synonym \hs{Word32} is defined that is equal to the
585 \hs{SizedWord} type constructor applied to the type \hs{D32}. \hs{D32}
586 is the \emph{type level representation} of the decimal number 32,
587 making the \hs{Word32} type a 32-bit unsigned word.
589 These types are translated to the \small{VHDL} \texttt{unsigned} and
590 \texttt{signed} respectively.
592 This is a vector type, that can contain elements of any other type and
593 has a fixed length. It has two type parameters: its
594 length and the type of the elements contained in it. By putting the
595 length parameter in the type, the length of a vector can be determined
596 at compile time, instead of only at run-time for conventional lists.
598 The \hs{Vector} type constructor takes two type arguments: the length
599 of the vector and the type of the elements contained in it. The state
600 type of an 8 element register bank would then for example be:
603 type RegisterState = Vector D8 Word32
606 Here, a type synonym \hs{RegisterState} is defined that is equal to
607 the \hs{Vector} type constructor applied to the types \hs{D8} (The type
608 level representation of the decimal number 8) and \hs{Word32} (The 32
609 bit word type as defined above). In other words, the
610 \hs{RegisterState} type is a vector of 8 32-bit words.
612 A fixed size vector is translated to a \VHDL\ array type.
613 \item[\hs{RangedWord}]
614 This is another type to describe integers, but unlike the previous
615 two it has no specific bit-width, but an upper bound. This means that
616 its range is not limited to powers of two, but can be any number.
617 A \hs{RangedWord} only has an upper bound, its lower bound is
618 implicitly zero. There is a lot of added implementation complexity
619 when adding a lower bound and having just an upper bound was enough
620 for the primary purpose of this type: type-safely indexing vectors.
622 To define an index for the 8 element vector above, we would do:
625 type RegisterIndex = RangedWord D7
628 Here, a type synonym \hs{RegisterIndex} is defined that is equal to
629 the \hs{RangedWord} type constructor applied to the type \hs{D7}. In
630 other words, this defines an unsigned word with values from
631 0 to 7 (inclusive). This word can be be used to index the
632 8 element vector \hs{RegisterState} above.
634 This type is translated to the \texttt{unsigned} \VHDL type.
636 \subsection{User-defined types}
637 There are three ways to define new types in Haskell: algebraic
638 data-types with the \hs{data} keyword, type synonyms with the \hs{type}
639 keyword and type renamings with the \hs{newtype} keyword. \GHC\
640 offers a few more advanced ways to introduce types (type families,
641 existential typing, \small{GADT}s, etc.) which are not standard
642 Haskell. These will be left outside the scope of this research.
644 Only an algebraic datatype declaration actually introduces a
645 completely new type, for which we provide the \VHDL\ translation
646 below. Type synonyms and renamings only define new names for
647 existing types (where synonyms are completely interchangeable and
648 renamings need explicit conversion). Therefore, these do not need
649 any particular \VHDL\ translation, a synonym or renamed type will
650 just use the same representation as the original type. The
651 distinction between a renaming and a synonym does no longer matter
652 in hardware and can be disregarded in the generated \VHDL.
654 For algebraic types, we can make the following distinction:
659 A product type is an algebraic datatype with a single constructor with
660 two or more fields, denoted in practice like (a,b), (a,b,c), etc. This
661 is essentially a way to pack a few values together in a record-like
662 structure. In fact, the built-in tuple types are just algebraic product
663 types (and are thus supported in exactly the same way).
665 The ``product'' in its name refers to the collection of values belonging
666 to this type. The collection for a product type is the Cartesian
667 product of the collections for the types of its fields.
669 These types are translated to \VHDL\ record types, with one field for
670 every field in the constructor. This translation applies to all single
671 constructor algebraic data-types, including those with just one
672 field (which are technically not a product, but generate a VHDL
673 record for implementation simplicity).
674 \item[Enumerated types]
675 An enumerated type is an algebraic datatype with multiple constructors, but
676 none of them have fields. This is essentially a way to get an
677 enumeration-like type containing alternatives.
679 Note that Haskell's \hs{Bool} type is also defined as an
680 enumeration type, but we have a fixed translation for that.
682 These types are translated to \VHDL\ enumerations, with one value for
683 each constructor. This allows references to these constructors to be
684 translated to the corresponding enumeration value.
686 A sum type is an algebraic datatype with multiple constructors, where
687 the constructors have one or more fields. Technically, a type with
688 more than one field per constructor is a sum of products type, but
689 for our purposes this distinction does not really make a
690 difference, so this distinction is note made.
692 The ``sum'' in its name refers again to the collection of values
693 belonging to this type. The collection for a sum type is the
694 union of the the collections for each of the constructors.
696 Sum types are currently not supported by the prototype, since there is
697 no obvious \VHDL\ alternative. They can easily be emulated, however, as
698 we will see from an example:
701 data Sum = A Bit Word | B Word
704 An obvious way to translate this would be to create an enumeration to
705 distinguish the constructors and then create a big record that
706 contains all the fields of all the constructors. This is the same
707 translation that would result from the following enumeration and
708 product type (using a tuple for clarity):
712 type Sum = (SumC, Bit, Word, Word)
715 Here, the \hs{SumC} type effectively signals which of the latter three
716 fields of the \hs{Sum} type are valid (the first two if \hs{A}, the
717 last one if \hs{B}), all the other ones have no useful value.
719 An obvious problem with this naive approach is the space usage: the
720 example above generates a fairly big \VHDL\ type. Since we can be
721 sure that the two \hs{Word}s in the \hs{Sum} type will never be valid
722 at the same time, this is a waste of space.
724 Obviously, duplication detection could be used to reuse a
725 particular field for another constructor, but this would only
726 partially solve the problem. If two fields would be, for
727 example, an array of 8 bits and an 8 bit unsigned word, these are
728 different types and could not be shared. However, in the final
729 hardware, both of these types would simply be 8 bit connections,
730 so we have a 100\% size increase by not sharing these.
734 \section{\CLaSH\ prototype}
738 \section{Related work}
739 Many functional hardware description languages have been developed over the years. Early work includes such languages as $\mu$FP~\cite{muFP}, an extension of Backus' FP language to synchronous streams, designed particularly for describing and reasoning about regular circuits. The Ruby~\cite{Ruby} language uses relations, instead of functions, to describe circuits, and has a particular focus on layout. HML~\cite{HML2} is a hardware modeling language based on the strict functional language ML, and has support for polymorphic types and higher-order functions. Published work suggests that there is no direct simulation support for HML, and that the translation to VHDL is only partial.
741 Like this work, many functional hardware description languages have some sort of foundation in the functional programming language Haskell. Hawk~\cite{Hawk1} uses Haskell to describe system-level executable specifications used to model the behavior of superscalar microprocessors. Hawk specifications can be simulated, but there seems to be no support for automated circuit synthesis. The ForSyDe~\cite{ForSyDe2} system uses Haskell to specify abstract system models, which can (manually) be transformed into an implementation model using semantic preserving transformations. ForSyDe has several simulation and synthesis backends, though synthesis is restricted to the synchronous subset of the ForSyDe language.
743 Lava~\cite{Lava} is a hardware description language that focuses on the structural representation of hardware. Besides support for simulation and circuit synthesis, Lava descriptions can be interfaced with formal method tools for formal verification. Lava descriptions are actually circuit generators when viewed from a synthesis viewpoint, in that the language elements of Haskell, such as choice, can be used to guide the circuit generation. If a developer wants to insert a choice element inside an actual circuit he will have to specify this explicitly as a component. In this respect \CLaSH\ differs from Lava, in that all the choice elements, such as case-statements and patter matching, are synthesized to choice elements in the eventual circuit. As such, richer control structures can both be specified and synthesized in \CLaSH\ compared to any of the languages mentioned in this section.
745 The merits of polymorphic typing, combined with higher-order functions, are now also recognized in the `main-stream' hardware description languages, exemplified by the new VHDL 2008 standard~\cite{VHDL2008}. VHDL-2008 has support to specify types as generics, thus allowing a developer to describe polymorphic components. Note that those types still require an explicit generic map, whereas type-inference and type-specialization are implicit in \CLaSH.
747 Wired~\cite{Wired},, T-Ruby~\cite{T-Ruby}, Hydra~\cite{Hydra}.
749 A functional language designed specifically for hardware design is $re{\mathit{FL}}^{ect}$~\cite{reFLect}, which draws experience from earlier language called FL~\cite{FL} to la
751 % An example of a floating figure using the graphicx package.
752 % Note that \label must occur AFTER (or within) \caption.
753 % For figures, \caption should occur after the \includegraphics.
754 % Note that IEEEtran v1.7 and later has special internal code that
755 % is designed to preserve the operation of \label within \caption
756 % even when the captionsoff option is in effect. However, because
757 % of issues like this, it may be the safest practice to put all your
758 % \label just after \caption rather than within \caption{}.
760 % Reminder: the "draftcls" or "draftclsnofoot", not "draft", class
761 % option should be used if it is desired that the figures are to be
762 % displayed while in draft mode.
766 %\includegraphics[width=2.5in]{myfigure}
767 % where an .eps filename suffix will be assumed under latex,
768 % and a .pdf suffix will be assumed for pdflatex; or what has been declared
769 % via \DeclareGraphicsExtensions.
770 %\caption{Simulation Results}
774 % Note that IEEE typically puts floats only at the top, even when this
775 % results in a large percentage of a column being occupied by floats.
778 % An example of a double column floating figure using two subfigures.
779 % (The subfig.sty package must be loaded for this to work.)
780 % The subfigure \label commands are set within each subfloat command, the
781 % \label for the overall figure must come after \caption.
782 % \hfil must be used as a separator to get equal spacing.
783 % The subfigure.sty package works much the same way, except \subfigure is
784 % used instead of \subfloat.
787 %\centerline{\subfloat[Case I]\includegraphics[width=2.5in]{subfigcase1}%
788 %\label{fig_first_case}}
790 %\subfloat[Case II]{\includegraphics[width=2.5in]{subfigcase2}%
791 %\label{fig_second_case}}}
792 %\caption{Simulation results}
796 % Note that often IEEE papers with subfigures do not employ subfigure
797 % captions (using the optional argument to \subfloat), but instead will
798 % reference/describe all of them (a), (b), etc., within the main caption.
801 % An example of a floating table. Note that, for IEEE style tables, the
802 % \caption command should come BEFORE the table. Table text will default to
803 % \footnotesize as IEEE normally uses this smaller font for tables.
804 % The \label must come after \caption as always.
807 %% increase table row spacing, adjust to taste
808 %\renewcommand{\arraystretch}{1.3}
809 % if using array.sty, it might be a good idea to tweak the value of
810 % \extrarowheight as needed to properly center the text within the cells
811 %\caption{An Example of a Table}
812 %\label{table_example}
814 %% Some packages, such as MDW tools, offer better commands for making tables
815 %% than the plain LaTeX2e tabular which is used here.
816 %\begin{tabular}{|c||c|}
826 % Note that IEEE does not put floats in the very first column - or typically
827 % anywhere on the first page for that matter. Also, in-text middle ("here")
828 % positioning is not used. Most IEEE journals/conferences use top floats
829 % exclusively. Note that, LaTeX2e, unlike IEEE journals/conferences, places
830 % footnotes above bottom floats. This can be corrected via the \fnbelowfloat
831 % command of the stfloats package.
836 The conclusion goes here.
841 % conference papers do not normally have an appendix
844 % use section* for acknowledgement
845 \section*{Acknowledgment}
848 The authors would like to thank...
854 % trigger a \newpage just before the given reference
855 % number - used to balance the columns on the last page
856 % adjust value as needed - may need to be readjusted if
857 % the document is modified later
858 %\IEEEtriggeratref{8}
859 % The "triggered" command can be changed if desired:
860 %\IEEEtriggercmd{\enlargethispage{-5in}}
864 % can use a bibliography generated by BibTeX as a .bbl file
865 % BibTeX documentation can be easily obtained at:
866 % http://www.ctan.org/tex-archive/biblio/bibtex/contrib/doc/
867 % The IEEEtran BibTeX style support page is at:
868 % http://www.michaelshell.org/tex/ieeetran/bibtex/
869 \bibliographystyle{IEEEtran}
870 % argument is your BibTeX string definitions and bibliography database(s)
871 \bibliography{IEEEabrv,cλash.bib}
873 % <OR> manually copy in the resultant .bbl file
874 % set second argument of \begin to the number of references
875 % (used to reserve space for the reference number labels box)
876 % \begin{thebibliography}{1}
878 % \bibitem{IEEEhowto:kopka}
879 % H.~Kopka and P.~W. Daly, \emph{A Guide to \LaTeX}, 3rd~ed.\hskip 1em plus
880 % 0.5em minus 0.4em\relax Harlow, England: Addison-Wesley, 1999.
882 % \end{thebibliography}
890 % vim: set ai sw=2 sts=2 expandtab: