1 % This file was created with JabRef 2.4.2.
5 author = {Emil Axelsson and Koen Claessen and Mary Sheeran},
6 title = {{Wired: Wire-Aware Circuit Design}},
7 booktitle = {{Proceedings of Conference on Correct Hardware Design and VeriÞcation
11 series = {{Lecture Notes in Computer Science}},
13 publisher = {Springer Verlag},
15 timestamp = {2010.01.21}
19 author = {Bjesse, Per and Claessen, Koen and Sheeran, Mary and Singh, Satnam},
20 title = {{Lava: hardware design in Haskell}},
21 booktitle = {{ICFP '98: Proceedings of the third ACM SIGPLAN international conference
22 on Functional programming}},
25 address = {New York, NY, USA},
27 doi = {http://doi.acm.org/10.1145/289423.289440},
28 isbn = {1-58113-024-4},
29 location = {Baltimore, Maryland, United States},
31 timestamp = {2010.01.20}
35 author = {Byron Cook and John Launchbury and John Matthews},
36 title = {{Specifying superscalar microprocessors in Hawk}},
37 booktitle = {{Formal Techniques for Hardware and Hardware-like Systems}},
40 timestamp = {2010.01.20}
44 author = {Grundy,Jim and Melham,Tom and O'Leary,John},
45 title = {{A reflective functional language for hardware design and theorem
47 journal = {Journal of Functional Programming},
52 doi = {10.1017/S0956796805005757},
54 timestamp = {2010.01.21}
58 author = {Jones, G. and Sheeran, M.},
59 title = {{Circuit Design in Ruby}},
60 booktitle = {{Formal Methods for VLSI Design}},
62 address = {Lyngby, Denmark},
63 publisher = {Elsevier Science Publishers},
64 citeulike-article-id = {304676},
65 journal = {Circuit Design in Ruby},
68 posted-at = {2005-08-26 18:08:07},
70 timestamp = {2010.01.20}
74 author = {Yanbing Li and Leeser, M.},
75 title = {{HML, a novel hardware description language and its translation to
77 journal = {{Very Large Scale Integration (VLSI) Systems, IEEE Transactions on}},
83 doi = {10.1109/92.820756},
85 keywords = {ML language, hardware description languages, type theoryHML, SML functional
86 programming language, VHDL translation, digital design, hardware
87 description language, polymorphic type, translator, type checker,
90 timestamp = {2010.01.20}
94 author = {Yanbing Li and Leeser, M.},
95 title = {{HML: an innovative hardware description language and its translation
97 booktitle = {{Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL
98 '95/VLSI '95., IFIP International Conference on Hardware Description
99 Languages; IFIP International Conference on Very Large Scale Integration.,
100 Asian and South Pacific}},
104 doi = {10.1109/ASPDAC.1995.486388},
105 keywords = {abstract data types, functional languages, functional programming,
106 hardware description languagesHML, VHDL, advanced type checking,
107 functional programming language, hardware description language, polymorphic
108 types, type inference},
110 timestamp = {2010.01.20}
113 @INPROCEEDINGS{Hawk1,
114 author = {Matthews, J. and Cook, B. and Launchbury, J.},
115 title = {{Microprocessor specification in Hawk}},
116 booktitle = {{Proceedings of 1998 International Conference on Computer Languages}},
120 abstract = {Modern microprocessors require an immense investment of time and effort
121 to create and verify, from the high level architectural design downwards.
122 We are exploring ways to increase the productivity of design engineers
123 by creating a domain specific language for specifying and simulating
124 processor architectures. We believe that the structuring principles
125 used in modern functional programming languages, such as static typing,
126 parametric polymorphism, first class functions, and lazy evaluation
127 provide a good formalism for such a domain specific language, and
128 have made initial progress by creating a library on top of the functional
129 language Haskell. We have specified the integer subset of an out
130 of order, superscalar DLX microprocessor, with register renaming,
131 a reorder buffer, a global reservation station, multiple execution
132 units, and speculative branch execution. Two key abstractions of
133 this library are the signal abstract data type (ADT), which models
134 the simulation history of a wire, and the transaction ADT, which
135 models the state of an entire instruction as it travels through the
137 doi = {10.1109/ICCL.1998.674160},
139 keywords = {abstract data types, formal specification, functional languages, functional
140 programming, hardware description languages, microprocessor chips,
141 software librariesHawk language, design engineers, domain specific
142 language, first class functions, functional language Haskell, functional
143 programming languages, global reservation station, high level architectural
144 design, integer subset, lazy evaluation, microprocessor specification,
145 multiple execution units, out of order superscalar DLX microprocessor,
146 parametric polymorphism, processor architecture simulation, register
147 renaming, reorder buffer, signal abstract data type, simulation history,
148 software library, speculative branch execution, static typing,, structuring
149 principles, transaction ADT},
151 timestamp = {2010.01.20}
154 @INPROCEEDINGS{Hydra,
155 author = {John O'Donnell},
156 title = {{From Transistors to Computer Architecture: Teaching Functional Circuit
157 Specification in Hydra}},
158 booktitle = {{Proceedings of the First International Symposium on Funtional Programming
159 Languages in Education}},
162 series = {Lecture Notes in Computer Science},
164 publisher = {Springer-Verlag},
166 timestamp = {2010.01.21}
170 author = {Ingo Sander and Axel Jantsch},
171 title = {{System Modeling and Transformational Design Refinement in ForSyDe}},
172 journal = {{IEEE Transactions on Computer-Aided Design of Integrated Circuits
181 timestamp = {2010.01.21}
184 @INPROCEEDINGS{ForSyDe1,
185 author = {Sander, Ingo and Jantsch, Axel},
186 title = {{Transformation based communication and clock domain refinement for
188 booktitle = {{DAC '02: Proceedings of the 39th annual Design Automation Conference}},
191 address = {New York, NY, USA},
193 doi = {http://doi.acm.org/10.1145/513918.513992},
194 isbn = {1-58113-461-4},
195 location = {New Orleans, Louisiana, USA},
197 timestamp = {2010.01.20}
200 @INPROCEEDINGS{T-Ruby,
201 author = {Sharp, Robin and Rasmussen, Ole},
202 title = {{Using a language of functions and relations for VLSI specification}},
203 booktitle = {FPCA '95: Proceedings of the seventh international conference on
204 Functional programming languages and computer architecture},
207 address = {New York, NY, USA},
209 doi = {http://doi.acm.org/10.1145/224164.224180},
210 isbn = {0-89791-719-7},
211 location = {La Jolla, California, United States},
213 timestamp = {2010.01.21}
217 author = {Sheeran, Mary},
218 title = {{$\mu$FP, a language for VLSI design}},
219 booktitle = {{LFP '84: Proceedings of the 1984 ACM Symposium on LISP and functional
223 address = {New York, NY, USA},
225 doi = {http://doi.acm.org/10.1145/800055.802026},
226 isbn = {0-89791-142-3},
227 location = {Austin, Texas, United States},
229 timestamp = {2010.01.20}
233 title = {{VHDL Language Reference Manual}},
234 organization = {IEEE},
235 number = {1076-2008},
238 timestamp = {2009.11.17}
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