From bfe8487df7ef91568b94e6646bb2f474469fb8c2 Mon Sep 17 00:00:00 2001 From: Christiaan Baaij Date: Thu, 20 Aug 2009 13:56:10 +0200 Subject: [PATCH] Fix the resetn signal in the testbench, it is now correctly '0' for 3 ns, and after that '1' --- "c\316\273ash/CLasH/VHDL/Testbench.hs" | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git "a/c\316\273ash/CLasH/VHDL/Testbench.hs" "b/c\316\273ash/CLasH/VHDL/Testbench.hs" index bc23262..2b31925 100644 --- "a/c\316\273ash/CLasH/VHDL/Testbench.hs" +++ "b/c\316\273ash/CLasH/VHDL/Testbench.hs" @@ -87,7 +87,7 @@ createTestbenchArch mCycles stimuli top testent= do (stimuliAssigns, stimuliDecs, cycles, used) <- createStimuliAssigns mCycles stimuli (head iIds) let finalAssigns = (AST.CSSASm (AST.NSimple resetId AST.:<==: AST.ConWforms [] - (AST.Wform [AST.WformElem (AST.PrimLit "'1'") (Just $ AST.PrimLit "3 ns")]) + (AST.Wform [AST.WformElem (AST.PrimLit "'0'") (Just $ AST.PrimLit "0 ns"), AST.WformElem (AST.PrimLit "'1'") (Just $ AST.PrimLit "3 ns")]) Nothing)) : stimuliAssigns let clkProc = createClkProc let arch = AST.ArchBody -- 2.30.2