Derive Show for a bunch of types.
[matthijs/master-project/cλash.git] / VHDLTypes.hs
2009-03-06 Matthijs KooijmanDerive Show for a bunch of types.
2009-03-04 Matthijs KooijmanProvide preliminary support for list types.
2009-02-17 Matthijs KooijmanRemove type parameterisation of SignalMap.
2009-02-17 Matthijs KooijmanDon't generate ports for non-port signals.
2009-02-16 Matthijs KooijmanLet mkCompInsSm look up the actual VHDL entity id.
2009-02-13 Matthijs KooijmanPut a TypeMark in a VHDLSignalmap.
2009-02-13 Matthijs KooijmanAdd the VHDLTypes module