From: Matthijs Kooijman <m.kooijman@student.utwente.nl>
Date: Thu, 29 Jan 2009 14:22:35 +0000 (+0100)
Subject: Add a trivial "wire" hardware model.
X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fc%CE%BBash.git;a=commitdiff_plain;h=c9b67e6b9c131a3e73bee4cdb4c4d37479e7bf36

Add a trivial "wire" hardware model.
---

diff --git a/Adders.hs b/Adders.hs
index f29927c..748c06f 100644
--- a/Adders.hs
+++ b/Adders.hs
@@ -10,6 +10,10 @@ show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displ
     b = [Low, Low, Low, High]
     (s, c) = f (a, b)
 
+-- Not really an adder, but this is nice minimal hardware description
+wire :: Bit -> Bit
+wire a = a
+
 -- Combinatoric stateless no-carry adder
 -- A -> B -> S
 no_carry_adder :: (Bit, Bit) -> Bit