From: christiaanb Date: Mon, 21 Jun 2010 11:32:58 +0000 (+0200) Subject: Enum are now integer typedefs instead of unsigned subtypedefs X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fc%CE%BBash.git;a=commitdiff_plain;h=bfcff194b5409ea0cc49a87c7844d1d8efb6bca4 Enum are now integer typedefs instead of unsigned subtypedefs --- diff --git a/clash/CLasH/VHDL/VHDLTools.hs b/clash/CLasH/VHDL/VHDLTools.hs index 521aa08..507fe3b 100644 --- a/clash/CLasH/VHDL/VHDLTools.hs +++ b/clash/CLasH/VHDL/VHDLTools.hs @@ -495,13 +495,11 @@ mkTyconTy htype = return $ Just (ty_id, Just $ Left ty_def) (EnumType tycon dcs) -> do let ty_id = mkVHDLExtId tycon - let possibilaties = case (length dcs) of 1 -> 1; x -> (x-1) - let bitsize = floor (logBase 2 (fromInteger (toInteger possibilaties))) - let range = AST.ConstraintIndex $ AST.IndexConstraint [AST.DownRange (AST.PrimLit $ show bitsize) (AST.PrimLit "0")] - let ty_def = AST.SubtypeIn unsignedTM (Just range) + let range = AST.SubTypeRange (AST.PrimLit "0") (AST.PrimLit $ show (length dcs)) + let ty_def = AST.TDI $ AST.IntegerTypeDef range let enumShow = mkEnumShow dcs ty_id MonadState.modify tsTypeFuns $ Map.insert (htype, showIdString) (showId, enumShow) - return $ Just (ty_id, Just $ Right ty_def) + return $ Just (ty_id, Just $ Left ty_def) otherwise -> error $ "\nVHDLTools.mkTyconTy: Called for HType that is neiter a AggrType or EnumType: " ++ show htype -- | Create a VHDL vector type