X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fc%CE%BBash.git;a=blobdiff_plain;f=Sim.hs;h=5a8fe2d56c9b3a808619bf04c86127d6b065f3c8;hp=c87f7605e727bed37e47898e9feb8346d36ea607;hb=9acc6fbecd5b8c65c1efa6ac4971adbafada05cd;hpb=2d19c3549cd9a3238aca195ce4ce9cc5f41c0eeb

diff --git a/Sim.hs b/Sim.hs
index c87f760..5a8fe2d 100644
--- a/Sim.hs
+++ b/Sim.hs
@@ -1,4 +1,4 @@
-module Sim (simulate, SCircuit, simulateIO) where
+module Sim (simulate, SCircuit, Circuit, simulateIO, stateless) where
 import Data.Typeable
 
 simulate f input s = do
@@ -13,6 +13,7 @@ simulate f input s = do
 
 -- A circuit with input of type a, state of type s and output of type b
 type SCircuit i s o = i -> s -> (s, o)
+type Circuit i o = i -> o
 
 run :: SCircuit i s o -> [i] -> s -> [(i, o, s)]
 run f (i:input) s =
@@ -49,4 +50,10 @@ printOutput (i, o, s) = do
   putStr "\nNew State: "
   putStr $ show s
   putStr "\n\n"
+
+-- Takes a stateless circuit and turns it into a stateful circuit (with an
+-- empty state) so it can be used in simulation
+stateless :: Circuit i o -> SCircuit i () o
+stateless f = \i s -> (s, f i)
+
 -- vim: set ts=8 sw=2 sts=2 expandtab: