X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fc%CE%BBash.git;a=blobdiff_plain;f=Sim.hs;h=5a8fe2d56c9b3a808619bf04c86127d6b065f3c8;hp=3848508c220b942412a3b9dd27b640abcb852e54;hb=HEAD;hpb=8303bf12f3783a0603dcbeacd10ca3648bc0a2b1

diff --git a/Sim.hs b/Sim.hs
index 3848508..5a8fe2d 100644
--- a/Sim.hs
+++ b/Sim.hs
@@ -1,4 +1,4 @@
-module Sim (simulate, SCircuit, Circuit, simulateIO) where
+module Sim (simulate, SCircuit, Circuit, simulateIO, stateless) where
 import Data.Typeable
 
 simulate f input s = do
@@ -50,4 +50,10 @@ printOutput (i, o, s) = do
   putStr "\nNew State: "
   putStr $ show s
   putStr "\n\n"
+
+-- Takes a stateless circuit and turns it into a stateful circuit (with an
+-- empty state) so it can be used in simulation
+stateless :: Circuit i o -> SCircuit i () o
+stateless f = \i s -> (s, f i)
+
 -- vim: set ts=8 sw=2 sts=2 expandtab: