update cabal file to upload to hackage

[matthijs/master-project/cλash.git] / cλash / CLasH / VHDL / VHDLTypes.hs

diff --git a/cλash/CLasH/VHDL/VHDLTypes.hs b/cλash/CLasH/VHDL/VHDLTypes.hs
index 64fb7ab10bd8d063a9954997946e3e34bfbcb5cb..38ccc97f875d6de3e32e3d6939d0459eb3e412b3 100644 (file)
--- a/cλash/CLasH/VHDL/VHDLTypes.hs
+++ b/cλash/CLasH/VHDL/VHDLTypes.hs
@@ -1,23 +1,11 @@
 --
 -- Some types used by the VHDL module.
 --
-{-# LANGUAGE TemplateHaskell #-}
 module CLasH.VHDL.VHDLTypes where
 
--- Standard imports
-import qualified Control.Monad.Trans.State as State
-import qualified Data.Map as Map
-import Data.Accessor
-import qualified Data.Accessor.Template
-
--- GHC API imports
-import qualified HscTypes
-
--- ForSyDe imports
+-- VHDL imports
 import qualified Language.VHDL.AST as AST
 
--- Local imports
-
 -- A description of a port of an entity
 type Port = (AST.VHDLId, AST.TypeMark)
 
@@ -25,9 +13,9 @@ type Port = (AST.VHDLId, AST.TypeMark)
 -- info on how to map a haskell value (argument / result) on to the entity's
 -- ports.
 data Entity = Entity { 
-  ent_id     :: AST.VHDLId,           -- The id of the entity
-  ent_args   :: [Port],      -- A mapping of each function argument to port names
-  ent_res    :: Port,         -- A mapping of the function result to port names
+  ent_id     :: AST.VHDLId, -- ^ The id of the entity
+  ent_args   :: [Port], -- ^ A port for each non-empty function argument
+  ent_res    :: Maybe Port, -- ^ The output port
   ent_dec    :: AST.EntityDec -- ^ The complete entity declaration
 } deriving (Show);