Reflect moving TFVec and TFP Integers into clash in sourcefiles related to builtin...

[matthijs/master-project/cλash.git] / cλash / CLasH / VHDL / Constants.hs

diff --git a/cλash/CLasH/VHDL/Constants.hs b/cλash/CLasH/VHDL/Constants.hs
index e6381fd7411037d5d6051143db3a44b6552d956f..c70ca71a04258b589b76798815a9a509ec4c9bb3 100644 (file)
--- a/cλash/CLasH/VHDL/Constants.hs
+++ b/cλash/CLasH/VHDL/Constants.hs
@@ -15,7 +15,7 @@ builtinIds = [ exId, replaceId, headId, lastId, tailId, initId, takeId, dropId
              , lteqId, gtId, gteqId, boolOrId, boolAndId, plusId, timesId
              , negateId, minusId, fromSizedWordId, fromIntegerId, resizeWordId
              , resizeIntId, sizedIntId, smallIntegerId, fstId, sndId, blockRAMId
-             , splitId, minimumId 
+             , splitId, minimumId, fromRangedWordId 
              ]
 --------------
 -- Identifiers
@@ -301,7 +301,10 @@ minusId = "-"
 
 -- | convert sizedword to ranged
 fromSizedWordId :: String
-fromSizedWordId = "fromSizedWord"
+fromSizedWordId = "fromUnsigned"
+
+fromRangedWordId :: String
+fromRangedWordId = "fromIndex"
 
 toIntegerId :: String
 toIntegerId = "to_integer"
@@ -328,10 +331,10 @@ smallIntegerId :: String
 smallIntegerId = "smallInteger"
 
 sizedIntId :: String
-sizedIntId = "SizedInt"
+sizedIntId = "Signed"
 
 tfvecId :: String
-tfvecId = "TFVec"
+tfvecId = "Vector"
 
 blockRAMId :: String
 blockRAMId = "blockRAM"