Keys for typemap can now deal with vector lengths based on type operators

[matthijs/master-project/cλash.git] / VHDLTypes.hs

diff --git a/VHDLTypes.hs b/VHDLTypes.hs
index 61fb0035650002fa61c95db39bb6c56429114bfb..4a1b01719300f0cc9dab8de620a19ed18b2dc21f 100644 (file)
--- a/VHDLTypes.hs
+++ b/VHDLTypes.hs
@@ -38,8 +38,14 @@ instance Eq OrdType where
 instance Ord OrdType where
   compare (OrdType a) (OrdType b) = Type.tcCmpType a b
 
+data HType = StdType OrdType |
+             ADTType String [HType] |
+             VecType Int HType |
+             BuiltinType String
+  deriving (Eq, Ord)
+
 -- A map of a Core type to the corresponding type name
-type TypeMap = Map.Map OrdType (AST.VHDLId, Either AST.TypeDef AST.SubtypeIn)
+type TypeMap = Map.Map HType (AST.VHDLId, Either AST.TypeDef AST.SubtypeIn)
 
 -- A map of a vector Core element type and function name to the coressponding
 -- VHDLId of the function and the function body.