Enable the DontCare value for Bit again.

[matthijs/master-project/cλash.git] / VHDL.hs

diff --git a/VHDL.hs b/VHDL.hs
index b85d6ff0be288e7db0ec57ca886fae79cbc6ec09..1c7eba9ea2e848fbca70c620357e1b0e9fb09f85 100644 (file)
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -320,7 +320,7 @@ vhdl_ty_maybe ty =
           let name = TyCon.tyConName tycon in
             -- TODO: Do something more robust than string matching
             case Name.getOccString name of
-              "Bit"      -> Just bit_ty
+              "Bit"      -> Just std_logic_ty
               otherwise  -> Nothing
         otherwise -> Nothing