From 0a090d8e4aa17d6f55f94af75972d77f0f963a99 Mon Sep 17 00:00:00 2001 From: Matthijs Kooijman Date: Wed, 5 Aug 2009 17:00:47 +0200 Subject: [PATCH] Use the right id for the testbench architecture. --- "c\316\273ash/CLasH/VHDL/Testbench.hs" | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git "a/c\316\273ash/CLasH/VHDL/Testbench.hs" "b/c\316\273ash/CLasH/VHDL/Testbench.hs" index 3f77b78..76fc073 100644 --- "a/c\316\273ash/CLasH/VHDL/Testbench.hs" +++ "b/c\316\273ash/CLasH/VHDL/Testbench.hs" @@ -41,7 +41,7 @@ createTestbench mCycles stimuli top = do bndr <- mkInternalVar "testbench" TysWiredIn.unitTy let entity = createTestbenchEntity bndr modA tsEntities (Map.insert bndr entity) - arch <- createTestbenchArch mCycles stimuli' top + arch <- createTestbenchArch mCycles stimuli' top entity modA tsArchitectures (Map.insert bndr arch) return bndr @@ -60,9 +60,10 @@ createTestbenchArch :: Maybe Int -- ^ Number of cycles to simulate -> [CoreSyn.CoreExpr] -- ^ Imput stimuli -> CoreSyn.CoreBndr -- ^ Top Entity + -> Entity -- ^ The signature to create an architecture for -> TranslatorSession (Architecture, [CoreSyn.CoreBndr]) -- ^ The architecture and any other entities used. -createTestbenchArch mCycles stimuli top = do +createTestbenchArch mCycles stimuli top testent= do signature <- getEntity top let entId = ent_id signature iIface = ent_args signature @@ -85,7 +86,7 @@ createTestbenchArch mCycles stimuli top = do let outputProc = createOutputProc [oId] let arch = AST.ArchBody (AST.unsafeVHDLBasicId "test") - (AST.NSimple $ AST.unsafeIdAppend entId "_tb") + (AST.NSimple $ ent_id testent) (map AST.BDISD (finalIDecs ++ stimuliDecs ++ [oDecs])) (mIns : ( (AST.CSPSm clkProc) : (AST.CSPSm outputProc) : finalAssigns ) ) -- 2.30.2