From: Matthijs Kooijman Date: Thu, 6 Aug 2009 14:20:51 +0000 (+0200) Subject: Don't generate VHDL for state packing. X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=fda239f0ae8fc6a2250e6719c3f564c9b2390c4a;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git Don't generate VHDL for state packing. --- diff --git "a/c\316\273ash/CLasH/VHDL/Generate.hs" "b/c\316\273ash/CLasH/VHDL/Generate.hs" index 5360cff..4de6b40 100644 --- "a/c\316\273ash/CLasH/VHDL/Generate.hs" +++ "b/c\316\273ash/CLasH/VHDL/Generate.hs" @@ -778,7 +778,7 @@ genApplication dst f args = do -- assignment here. f' <- MonadState.lift tsType $ varToVHDLExpr f return $ ([mkUncondAssign dst f'], []) - True -> + True | not stateful -> case Var.idDetails f of IdInfo.DataConWorkId dc -> case dst of -- It's a datacon. Create a record from its arguments. @@ -828,6 +828,16 @@ genApplication dst f args = do error $ "\nGenerate.genApplication(ClassOpId): Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ show args Nothing -> error $ "\nGenerate.genApplication(ClassOpId): Using function from another module that is not a known builtin: " ++ pprString f details -> error $ "\nGenerate.genApplication: Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details + -- If we can't generate a component instantiation, and the destination is + -- a state type, don't generate anything. + _ -> return ([], []) + where + -- Is our destination a state value? + stateful = case dst of + -- When our destination is a VHDL name, it won't have had a state type + Right _ -> False + -- Otherwise check its type + Left bndr -> hasStateType bndr ----------------------------------------------------------------------------- -- Functions to generate functions dealing with vectors.