From: Matthijs Kooijman <m.kooijman@student.utwente.nl>
Date: Fri, 19 Jun 2009 10:39:44 +0000 (+0200)
Subject: Support VHDL generation for two-alternative cases.
X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=8821af4a0d2b66f1ddc8fc5ab344a886a40c084f;hp=8821af4a0d2b66f1ddc8fc5ab344a886a40c084f;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

Support VHDL generation for two-alternative cases.

This does not support single alternatives statements yet, and will never
support more than two alternatives. Only supports case statements on Bit
and Bool types for now.
---