From: Matthijs Kooijman <m.kooijman@student.utwente.nl>
Date: Tue, 23 Jun 2009 14:17:23 +0000 (+0200)
Subject: Add a hardware module for a generalized Alu.
X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=69f55a9c6716f385e22378ce8be378e08b02377d;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

Add a hardware module for a generalized Alu.
---

diff --git a/HighOrdAlu.hs b/HighOrdAlu.hs
new file mode 100644
index 0000000..11636f2
--- /dev/null
+++ b/HighOrdAlu.hs
@@ -0,0 +1,30 @@
+module HighOrdAlu where
+
+import Prelude hiding (
+  null, length, head, tail, last, init, take, drop, (++), map, foldl, foldr,
+  zipWith, zip, unzip, concat, reverse, iterate )
+import Bits
+import Types
+import Data.Param.TFVec
+import Data.RangedWord
+
+constant :: e -> Op D4 e
+constant e a b =
+  e +> (e +> (e +> singleton e))
+
+inv = hwnot
+
+invop :: Op n Bit
+invop a b = map inv a
+
+type Op n e = (TFVec n e -> TFVec n e -> TFVec n e)
+type Opcode = Bit
+
+alu :: Op n e -> Op n e -> Opcode -> TFVec n e -> TFVec n e -> TFVec n e
+alu op1 op2 opc a b =
+  case opc of
+    Low -> op1 a b
+    High -> op2 a b
+
+zero_inv_alu :: Opcode -> TFVec D4 Bit -> TFVec D4 Bit -> TFVec D4 Bit
+zero_inv_alu = alu (constant Low) invop