From: Matthijs Kooijman <m.kooijman@student.utwente.nl>
Date: Mon, 6 Apr 2009 13:58:15 +0000 (+0200)
Subject: Use basic identifiers for builtins.
X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=4d203d3d6a58848bfb2e5be4309e8874bc3a5323;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

Use basic identifiers for builtins.
---

diff --git a/VHDL.hs b/VHDL.hs
index 263bae8..836f06b 100644
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -444,7 +444,7 @@ data BuiltIn = BuiltIn String [PortMap] PortMap
 mkBuiltins :: [BuiltIn] -> SignatureMap
 mkBuiltins = Map.fromList . map (\(BuiltIn name args res) ->
     (HsFunction name (map useAsPort args) (useAsPort res),
-     Entity (VHDL.mkVHDLExtId name) (map toVHDLSignalMap args) (toVHDLSignalMap res))
+     Entity (VHDL.mkVHDLBasicId name) (map toVHDLSignalMap args) (toVHDLSignalMap res))
   )
 
 builtin_hsfuncs = Map.keys builtin_funcs
@@ -459,4 +459,4 @@ builtin_funcs = mkBuiltins
 -- | Map a port specification of a builtin function to a VHDL Signal to put in
 --   a VHDLSignalMap
 toVHDLSignalMap :: HsValueMap (String, AST.TypeMark) -> VHDLSignalMap
-toVHDLSignalMap = fmap (\(name, ty) -> Just (mkVHDLExtId name, ty))
+toVHDLSignalMap = fmap (\(name, ty) -> Just (mkVHDLBasicId name, ty))