From: Matthijs Kooijman <m.kooijman@student.utwente.nl>
Date: Mon, 13 Jul 2009 09:57:25 +0000 (+0200)
Subject: Generate proper VHDL for top level bindings with no arguments.
X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=46f93616d6a7ef012c5f07698d56372881196015;hp=46f93616d6a7ef012c5f07698d56372881196015;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

Generate proper VHDL for top level bindings with no arguments.

Previously, a = b bindings would always generate an unconditional
assignment. Now, they use genApplication to generate VHDL, and
genApplications knows how to generate unconditional assignments when b is
a local identifier, and a component instantiation when b is a top level
binder.
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