Use the actual FSVec length to create VHDL vectors.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 6 Apr 2009 12:00:20 +0000 (14:00 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 6 Apr 2009 12:00:20 +0000 (14:00 +0200)

No differences found