Add stateful alu (with empty state).

diff --git a/Alu.hs b/Alu.hs
index 78c5afcfe5504c8747aeb314d45511b4a79a8cc2..f26bb831b45f85526d7b9b3f23ad9e70445bc0fd 100644 (file)
--- a/Alu.hs
+++ b/Alu.hs
@@ -51,6 +51,10 @@ alu :: AluOp -> Bit -> Bit -> Bit
 alu High a b = a `hwand` b
 alu Low a b = a `hwor` b
 
+salu :: AluOp -> Bit -> Bit -> () -> ((), Bit)
+salu High a b s = (s, a `hwand` b)
+salu Low a b s = (s, a `hwor` b)
+
 type ExecState = (RegisterBankState, Bit, Bit)
 exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, ())