Add a brainstorm for an outline.
authorMatthijs Kooijman <matthijs@stdin.nl>
Wed, 9 Sep 2009 17:56:28 +0000 (19:56 +0200)
committerMatthijs Kooijman <matthijs@stdin.nl>
Wed, 9 Sep 2009 17:56:28 +0000 (19:56 +0200)
Outline [new file with mode: 0644]

diff --git a/Outline b/Outline
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+Implementation issues
+
+State
+
+Prototype
+       Stages (-> Core, Normalization, -> VHDL)
+
+Core
+
+VHDL vs EDIF generation
+
+Normalization
+       Normal form
+       Rules used
+       Completeness / conditions on input
+       Termination
+       Casts
+
+Context
+
+Other FHDLs
+
+VHDL / Verilog / EDIF etc.
+
+Advantages of clash / why clash?
+
+Haskell as hardware
+       Dependent types
+       Impossible things: Infinite recursion, higher order expressions
+
+Haskell language coverage / constraints
+       Recursion
+       Builtin types
+       Custom types (Sum types, product types)
+       Function types / higher order expressions
+
+Future work
+       Boilerplate reduction (State distribution & pipelining)
+       Recursion
+       Multiple time domains
+       Multiple cycle descriptions