Put a TypeMark in a VHDLSignalmap.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Fri, 13 Feb 2009 12:43:51 +0000 (13:43 +0100)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Fri, 13 Feb 2009 12:43:51 +0000 (13:43 +0100)

No differences found