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Add a Type to a Literal SignalExpr.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Tue, 14 Apr 2009 09:24:34 +0000 (11:24 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Tue, 14 Apr 2009 09:24:34 +0000 (11:24 +0200)
The Type is still unused, but will be used for making the VHDL backend add
a typecast (since the actual VHDL name for the type is not known
earlier).


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