Filter out dots from generated type id's.

diff --git a/VHDL.hs b/VHDL.hs
index c1b42b3bc89a9b2764ff60626957a036b9242649..ae72368f4f9fd0b6eccbe9f20f7836ef0d4da733 100644 (file)
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -369,7 +369,8 @@ mk_fsvec_ty ty args = do
   -- Assume there are two type arguments
   let [len, el_ty] = args 
   -- TODO: Find actual number
-  let ty_id = mkVHDLId ("vector_" ++ (show len))
+  -- Construct the type id, but filter out dots (since these are not allowed).
+  let ty_id = mkVHDLId $ filter (/='.') ("vector_" ++ (show len))
   -- TODO: Use el_ty
   let range = AST.IndexConstraint [AST.ToRange (AST.PrimLit "0") (AST.PrimLit "16")]
   let ty_def = AST.TDA $ AST.ConsArrayDef range std_logic_ty