Merge branch 'cλash' of http://git.stderr.nl/matthijs/projects/master-project

* 'cλash' of http://git.stderr.nl/matthijs/projects/master-project:
  Don't generate a state proc for an empty state.
  Make splitNormalized work for non-recursive lets.
  Add and use splitNormalized helper function.

diff --cc cλash/CLasH/VHDL/Generate.hs
index 99d5d270dc976ef84abe470bac6249a02db1feaa,149c6eca1fcd6e28d0e782f5af8a60ca9e61b998..0be4f60be94c58bec17826191353d832ad83482a
--- 1/cλash/CLasH/VHDL/Generate.hs
--- 2/cλash/CLasH/VHDL/Generate.hs
+++ b/cλash/CLasH/VHDL/Generate.hs
@@@ -44,17 -44,13 +44,15 @@@ getEntity :
  
  getEntity fname = Utils.makeCached fname tsEntities $ do
        expr <- Normalize.getNormalized fname
-       -- Strip off lambda's, these will be arguments
-       let (args, letexpr) = CoreSyn.collectBinders expr
+       -- Split the normalized expression
+       let (args, binds, res) = Normalize.splitNormalized expr
        -- Generate ports for all non-empty types
        args' <- catMaybesM $ mapM mkMap args
-       -- There must be a let at top level 
-       let (CoreSyn.Let binds (CoreSyn.Var res)) = letexpr
        -- TODO: Handle Nothing
        res' <- mkMap res
 -      let vhdl_id = mkVHDLBasicId $ varToString fname ++ "_" ++ varToStringUniq fname
 +      count <- getA tsEntityCounter 
 +      let vhdl_id = mkVHDLBasicId $ varToString fname ++ "Component_" ++ show count
 +      putA tsEntityCounter (count + 1)
        let ent_decl = createEntityAST vhdl_id args' res'
        let signature = Entity vhdl_id args' res' ent_decl
        return signature