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+% This file was created with JabRef 2.4.2.
+% Encoding: MacRoman
+
+@INPROCEEDINGS{Lava,
+ author = {Bjesse, Per and Claessen, Koen and Sheeran, Mary and Singh, Satnam},
+ title = {{Lava: hardware design in Haskell}},
+ booktitle = {{ICFP '98: Proceedings of the third ACM SIGPLAN international conference
+ on Functional programming}},
+ year = {1998},
+ pages = {174--184},
+ address = {New York, NY, USA},
+ publisher = {ACM},
+ doi = {http://doi.acm.org/10.1145/289423.289440},
+ isbn = {1-58113-024-4},
+ location = {Baltimore, Maryland, United States},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{Hawk2,
+ author = {Byron Cook and John Launchbury and John Matthews},
+ title = {{Specifying superscalar microprocessors in Hawk}},
+ booktitle = {{Formal Techniques for Hardware and Hardware-like Systems}},
+ year = {1998},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{Ruby,
+ author = {Jones, G. and Sheeran, M.},
+ title = {{Circuit Design in Ruby}},
+ booktitle = {{Formal Methods for VLSI Design}},
+ year = {1990},
+ address = {Lyngby, Denmark},
+ publisher = {Elsevier Science Publishers},
+ citeulike-article-id = {304676},
+ journal = {Circuit Design in Ruby},
+ keywords = {jones90},
+ owner = {darchon},
+ posted-at = {2005-08-26 18:08:07},
+ priority = {0},
+ timestamp = {2010.01.20}
+}
+
+@ARTICLE{HML2,
+ author = {Yanbing Li and Leeser, M.},
+ title = {{HML, a novel hardware description language and its translation to
+ VHDL}},
+ journal = {{Very Large Scale Integration (VLSI) Systems, IEEE Transactions on}},
+ year = {2000},
+ volume = {8},
+ pages = {1-8},
+ number = {1},
+ month = {Feb},
+ doi = {10.1109/92.820756},
+ issn = {1063-8210},
+ keywords = {ML language, hardware description languages, type theoryHML, SML functional
+ programming language, VHDL translation, digital design, hardware
+ description language, polymorphic type, translator, type checker,
+ type inference},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{HML1,
+ author = {Yanbing Li and Leeser, M.},
+ title = {{HML: an innovative hardware description language and its translation
+ to VHDL}},
+ booktitle = {{Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL
+ '95/VLSI '95., IFIP International Conference on Hardware Description
+ Languages; IFIP International Conference on Very Large Scale Integration.,
+ Asian and South Pacific}},
+ year = {1995},
+ pages = {691-696},
+ month = {Aug-1 Sep},
+ doi = {10.1109/ASPDAC.1995.486388},
+ keywords = {abstract data types, functional languages, functional programming,
+ hardware description languagesHML, VHDL, advanced type checking,
+ functional programming language, hardware description language, polymorphic
+ types, type inference},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{Hawk1,
+ author = {Matthews, J. and Cook, B. and Launchbury, J.},
+ title = {{Microprocessor specification in Hawk}},
+ booktitle = {{Proceedings of 1998 International Conference on Computer Languages}},
+ year = {1998},
+ pages = {90-101},
+ month = {May},
+ abstract = {Modern microprocessors require an immense investment of time and effort
+ to create and verify, from the high level architectural design downwards.
+ We are exploring ways to increase the productivity of design engineers
+ by creating a domain specific language for specifying and simulating
+ processor architectures. We believe that the structuring principles
+ used in modern functional programming languages, such as static typing,
+ parametric polymorphism, first class functions, and lazy evaluation
+ provide a good formalism for such a domain specific language, and
+ have made initial progress by creating a library on top of the functional
+ language Haskell. We have specified the integer subset of an out
+ of order, superscalar DLX microprocessor, with register renaming,
+ a reorder buffer, a global reservation station, multiple execution
+ units, and speculative branch execution. Two key abstractions of
+ this library are the signal abstract data type (ADT), which models
+ the simulation history of a wire, and the transaction ADT, which
+ models the state of an entire instruction as it travels through the
+ microprocessor},
+ doi = {10.1109/ICCL.1998.674160},
+ issn = {1074-8970},
+ keywords = {abstract data types, formal specification, functional languages, functional
+ programming, hardware description languages, microprocessor chips,
+ software librariesHawk language, design engineers, domain specific
+ language, first class functions, functional language Haskell, functional
+ programming languages, global reservation station, high level architectural
+ design, integer subset, lazy evaluation, microprocessor specification,
+ multiple execution units, out of order superscalar DLX microprocessor,
+ parametric polymorphism, processor architecture simulation, register
+ renaming, reorder buffer, signal abstract data type, simulation history,
+ software library, speculative branch execution, static typing,, structuring
+ principles, transaction ADT},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{ForSyDe,
+ author = {Sander, Ingo and Jantsch, Axel},
+ title = {{Transformation based communication and clock domain refinement for
+ system design}},
+ booktitle = {{DAC '02: Proceedings of the 39th annual Design Automation Conference}},
+ year = {2002},
+ pages = {281--286},
+ address = {New York, NY, USA},
+ publisher = {ACM},
+ doi = {http://doi.acm.org/10.1145/513918.513992},
+ isbn = {1-58113-461-4},
+ location = {New Orleans, Louisiana, USA},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@INPROCEEDINGS{muFP,
+ author = {Sheeran, Mary},
+ title = {{$\mu$FP, a language for VLSI design}},
+ booktitle = {{LFP '84: Proceedings of the 1984 ACM Symposium on LISP and functional
+ programming}},
+ year = {1984},
+ pages = {104--112},
+ address = {New York, NY, USA},
+ publisher = {ACM},
+ doi = {http://doi.acm.org/10.1145/800055.802026},
+ isbn = {0-89791-142-3},
+ location = {Austin, Texas, United States},
+ owner = {darchon},
+ timestamp = {2010.01.20}
+}
+
+@STANDARD{VHDL2008,
+ title = {{VHDL Language Reference Manual}},
+ organization = {IEEE},
+ number = {1076-2008},
+ year = {2008},
+ owner = {darchon},
+ timestamp = {2009.11.17}
+}
+
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