Add an invertor hardware model.

diff --git a/Adders.hs b/Adders.hs
index 748c06fdb73e50158297e887b07939cb57d3865e..c2810d5b397af025816fa3e0ed5a87e95163ab0d 100644 (file)
--- a/Adders.hs
+++ b/Adders.hs
@@ -14,6 +14,10 @@ show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displ
 wire :: Bit -> Bit
 wire a = a
 
+-- Not really an adder either, but a slightly more complex example
+inv :: Bit -> Bit
+inv a = hwnot a
+
 -- Combinatoric stateless no-carry adder
 -- A -> B -> S
 no_carry_adder :: (Bit, Bit) -> Bit