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Give HighOrdAlu an and operation.
author
Matthijs Kooijman
<m.kooijman@student.utwente.nl>
Thu, 25 Jun 2009 09:11:10 +0000
(11:11 +0200)
committer
Matthijs Kooijman
<m.kooijman@student.utwente.nl>
Thu, 25 Jun 2009 09:11:10 +0000
(11:11 +0200)
HighOrdAlu.hs
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diff --git
a/HighOrdAlu.hs
b/HighOrdAlu.hs
index cdef7710c206a817b1bedcfa030bdbfefdd6bfe3..6458f3c968958b8f265057b1fe173c534cdbe3cb 100644
(file)
--- a/
HighOrdAlu.hs
+++ b/
HighOrdAlu.hs
@@
-10,13
+10,18
@@
import Data.RangedWord
constant :: e -> Op D4 e
constant e a b =
constant :: e -> Op D4 e
constant e a b =
- e +> (e +> (e +> (
e +> empty
)))
+ e +> (e +> (e +> (
singleton e
)))
inv = hwnot
invop :: Op n Bit
invop a b = map inv a
inv = hwnot
invop :: Op n Bit
invop a b = map inv a
+xand = hwand
+
+andop :: Op n Bit
+andop a b = zipWith xand a b
+
type Op n e = (TFVec n e -> TFVec n e -> TFVec n e)
type Opcode = Bit
type Op n e = (TFVec n e -> TFVec n e -> TFVec n e)
type Opcode = Bit
@@
-26,5
+31,5
@@
alu op1 op2 opc a b =
Low -> op1 a b
High -> op2 a b
Low -> op1 a b
High -> op2 a b
-
zero_inv
_alu :: Opcode -> TFVec D4 Bit -> TFVec D4 Bit -> TFVec D4 Bit
-
zero_inv_alu = alu (constant Low) inv
op
+
actual
_alu :: Opcode -> TFVec D4 Bit -> TFVec D4 Bit -> TFVec D4 Bit
+
actual_alu = alu (constant Low) and
op