Merge git://github.com/darchon/clash into cλash

* git://github.com/darchon/clash:
  Added singleton
  Almost finished support for 'map'

Conflicts:
	VHDL.hs

diff --cc VHDL.hs
index 15eb4c59330327e7f82fac05e5aa4391c50b1fbe,99aa08907f33f1153a773b1bbdd9e6e558167812..6a89930bf57c1d21d0a3c5bfb69f61923b225a88
--- 1/VHDL.hs
--- 2/VHDL.hs
+++ b/VHDL.hs
@@@ -297,14 -298,27 +298,26 @@@ mkConcSm (bndr, app@(CoreSyn.App _ _))
        case (Map.lookup (bndrToString f) funSignatures) of
          Just (arg_count, builder) ->
            if length valargs == arg_count then
-             let
-               sigs = map (varToVHDLExpr.varBndr) valargs
-               func = builder sigs
-               src_wform = AST.Wform [AST.WformElem func Nothing]
-               dst_name = AST.NSimple (mkVHDLExtId (bndrToString bndr))
-               assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
-             in
-               return [AST.CSSASm assign]
+             case builder of
+               Left funBuilder ->
+                 let
 -                  sigs = map (bndrToString.varBndr) valargs
 -                  sigsNames = map (\signal -> (AST.PrimName (AST.NSimple (mkVHDLExtId signal)))) sigs
 -                  func = funBuilder sigsNames
++                  sigs = map (varToVHDLExpr.varBndr) valargs
++                  func = funBuilder sigs
+                   src_wform = AST.Wform [AST.WformElem func Nothing]
+                   dst_name = AST.NSimple (mkVHDLExtId (bndrToString bndr))
+                   assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
+                 in
+                   return [AST.CSSASm assign]
+               Right genBuilder ->
+                 let
+                   sigs = map varBndr valargs
+                   signature = Maybe.fromMaybe
+                     (error $ "Using function '" ++ (bndrToString (head sigs)) ++ "' without signature? This should not happen!") 
+                     (Map.lookup (head sigs) signatures)
+                   arg_names = map (mkVHDLExtId . bndrToString) (tail sigs)
+                   dst_name = mkVHDLExtId (bndrToString bndr)
+                   genSm = genBuilder 4 signature (arg_names ++ [dst_name])  
+                 in return [AST.CSGSm genSm]
            else
              error $ "VHDL.mkConcSm Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ pprString valargs
          Nothing -> error $ "Using function from another module that is not a known builtin: " ++ pprString f