Use the actual FSVec length to create VHDL vectors.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 6 Apr 2009 12:00:20 +0000 (14:00 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 6 Apr 2009 12:00:20 +0000 (14:00 +0200)
commitfb29d85dcdc8ccc48f4d37f5997c7182e0b8776d
tree073af56003cc62a5a0afeb1f3d33a8f5e521a48e
parent4cddf82f566e2e7ac07b6b50716b765b4bc91cfc
Use the actual FSVec length to create VHDL vectors.
VHDL.hs