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(parent: b4ae262) | patch
Map generations always maps clk port
authorChristiaan Baaij <christiaan.baaij@gmail.com>
Tue, 23 Jun 2009 13:37:51 +0000 (15:37 +0200)
committerChristiaan Baaij <christiaan.baaij@gmail.com>
Tue, 23 Jun 2009 13:37:51 +0000 (15:37 +0200)
commitee39139fa25cb75c8acc40b10d90f6482b8d1b30
tree317e823938cc40b6a1b344810f17d57270365118tree | snapshot
parentb4ae262efb842ce254721f0f9ed9f0936241e094commit | diff
Map generations always maps clk port

gen function is butt ugly, needs to be fixed
Generate.hs diff | blob | history
VHDL.hs diff | blob | history
The Cλash compiler