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(parent: 3fb6a3a) | patch
Support VHDL generation for two-alternative cases.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Fri, 19 Jun 2009 10:39:44 +0000 (12:39 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Fri, 19 Jun 2009 10:39:44 +0000 (12:39 +0200)
commit8821af4a0d2b66f1ddc8fc5ab344a886a40c084f
tree08c43682e698cefe496c425511fdd2fc454355a5tree | snapshot
parent3fb6a3a819f85d89853660347b42f6085d20fb57commit | diff
Support VHDL generation for two-alternative cases.

This does not support single alternatives statements yet, and will never
support more than two alternatives. Only supports case statements on Bit
and Bool types for now.
VHDL.hs diff | blob | history
The Cλash compiler