Map the clk port on stateful function applications.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Wed, 4 Mar 2009 10:35:08 +0000 (11:35 +0100)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Wed, 4 Mar 2009 10:35:08 +0000 (11:35 +0100)
commit57a2771de1d155d9c382614531f88882ed74325b
tree3728f6ace789c13daacc685d829f01b6dd2c1e7b
parentee868ded42dccf7679190420e8d348aa8d727b98
Map the clk port on stateful function applications.
VHDL.hs