Add shiftL and shiftR operators for signed and unsigned. Update name of shiftl and...
authorchristiaanb <christiaan.baaij@gmail.com>
Thu, 17 Jun 2010 21:14:07 +0000 (23:14 +0200)
committerchristiaanb <christiaan.baaij@gmail.com>
Thu, 17 Jun 2010 21:14:07 +0000 (23:14 +0200)
commit30969fa41ee30295f00cf089f4ee4385bb709871
tree1ce1dbcebd458852992d1c72620c25f88d5e883c
parenta37aac300ad93f0fd5edbed645655c2af2915002
Add shiftL and shiftR operators for signed and unsigned. Update name of shiftl and shiftr in Vector type to shiftIntoL and shiftIntoR
HigherOrderCPU.hs
clash/CLasH/HardwareTypes.hs
clash/CLasH/VHDL/Constants.hs
clash/CLasH/VHDL/Generate.hs
clash/Data/Param/Index.hs
clash/Data/Param/Integer.hs
clash/Data/Param/Signed.hs
clash/Data/Param/Unsigned.hs