Vertically center the register output port.
authorMatthijs Kooijman <matthijs@stdin.nl>
Mon, 5 Oct 2009 12:15:42 +0000 (14:15 +0200)
committerMatthijs Kooijman <matthijs@stdin.nl>
Mon, 5 Oct 2009 12:15:42 +0000 (14:15 +0200)
commit18e247310fe31a0ab3696ee0f110cc078df0e132
treec371a45eb26c6bc38c2e29e6ba2fe54e39c89110
parent600d280f5ab94fa48bc84fc13b7d485b868918d3
Vertically center the register output port.
Utils/Metapost.tex