Generate a state proc for a stateful function.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Wed, 12 Aug 2009 15:12:53 +0000 (17:12 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Wed, 12 Aug 2009 15:13:05 +0000 (17:13 +0200)
commit12f3011b6d8b84de55288aa15dbaf3ce8f011be4
tree1eae1670fe0fe5e99a633d98f4151dd0a7880cf5
parentf8eab7bbb02bf1db6db8ff2697db8dd85080582b
Generate a state proc for a stateful function.

This means that stateful functions can now be succesfully compiled to some
extent (the Alu example only works without the simplifier).
cλash/CLasH/VHDL/Generate.hs