X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=c%CE%BBash%2FCLasH%2FVHDL%2FConstants.hs;h=c70ca71a04258b589b76798815a9a509ec4c9bb3;hb=fb44a1f428ffb4ef84e27a4bfdcd859ab3ba6c82;hp=f465d848642c6e8b47e92716ea652af784992f03;hpb=4c63601269c7097e2177c547dc36d4edecc1c648;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git "a/c\316\273ash/CLasH/VHDL/Constants.hs" "b/c\316\273ash/CLasH/VHDL/Constants.hs" index f465d84..c70ca71 100644 --- "a/c\316\273ash/CLasH/VHDL/Constants.hs" +++ "b/c\316\273ash/CLasH/VHDL/Constants.hs" @@ -1,7 +1,22 @@ module CLasH.VHDL.Constants where - + +-- VHDL Imports import qualified Language.VHDL.AST as AST +-- | A list of all builtin functions. Partly duplicates the name table +-- in VHDL.Generate, but we can't use that map everywhere due to +-- circular dependencie. +builtinIds = [ exId, replaceId, headId, lastId, tailId, initId, takeId, dropId + , selId, plusgtId, ltplusId, plusplusId, mapId, zipWithId, foldlId + , foldrId, zipId, unzipId, shiftlId, shiftrId, rotlId, rotrId + , concatId, reverseId, iteratenId, iterateId, generatenId, generateId + , emptyId, singletonId, copynId, copyId, lengthTId, nullId + , hwxorId, hwandId, hworId, hwnotId, equalityId, inEqualityId, ltId + , lteqId, gtId, gteqId, boolOrId, boolAndId, plusId, timesId + , negateId, minusId, fromSizedWordId, fromIntegerId, resizeWordId + , resizeIntId, sizedIntId, smallIntegerId, fstId, sndId, blockRAMId + , splitId, minimumId, fromRangedWordId + ] -------------- -- Identifiers -------------- @@ -16,6 +31,8 @@ resetId, clockId :: AST.VHDLId resetId = AST.unsafeVHDLBasicId resetStr clockId = AST.unsafeVHDLBasicId clockStr +integerId :: AST.VHDLId +integerId = AST.unsafeVHDLBasicId "integer" -- | \"types\" identifier typesId :: AST.VHDLId @@ -123,6 +140,9 @@ initId = "init" tailId :: String tailId = "tail" +-- | minimum ftp function identifier +minimumId :: String +minimumId = "minimum" -- | take function identifier takeId :: String @@ -224,6 +244,43 @@ hwandId = "hwand" lengthTId :: String lengthTId = "lengthT" +fstId :: String +fstId = "fst" + +sndId :: String +sndId = "snd" + +splitId :: String +splitId = "split" + +-- Equality Operations +equalityId :: String +equalityId = "==" + +inEqualityId :: String +inEqualityId = "/=" + +gtId :: String +gtId = ">" + +ltId :: String +ltId = "<" + +gteqId :: String +gteqId = ">=" + +lteqId :: String +lteqId = "<=" + +boolOrId :: String +boolOrId = "||" + +boolAndId :: String +boolAndId = "&&" + +boolNot :: String +boolNot = "not" + -- Numeric Operations -- | plus operation identifier @@ -244,7 +301,10 @@ minusId = "-" -- | convert sizedword to ranged fromSizedWordId :: String -fromSizedWordId = "fromSizedWord" +fromSizedWordId = "fromUnsigned" + +fromRangedWordId :: String +fromRangedWordId = "fromIndex" toIntegerId :: String toIntegerId = "to_integer" @@ -261,12 +321,30 @@ toUnsignedId = "to_unsigned" resizeId :: String resizeId = "resize" +resizeWordId :: String +resizeWordId = "resizeWord" + +resizeIntId :: String +resizeIntId = "resizeInt" + +smallIntegerId :: String +smallIntegerId = "smallInteger" + +sizedIntId :: String +sizedIntId = "Signed" + +tfvecId :: String +tfvecId = "Vector" + +blockRAMId :: String +blockRAMId = "blockRAM" + -- | output file identifier (from std.textio) showIdString :: String showIdString = "show" showId :: AST.VHDLId -showId = AST.unsafeVHDLBasicId showIdString +showId = AST.unsafeVHDLExtId showIdString -- | write function identifier (from std.textio) writeId :: AST.VHDLId @@ -311,3 +389,11 @@ signedTM = AST.unsafeVHDLBasicId "signed" -- | unsigned TypeMark unsignedTM :: AST.TypeMark unsignedTM = AST.unsafeVHDLBasicId "unsigned" + +-- | string TypeMark +stringTM :: AST.TypeMark +stringTM = AST.unsafeVHDLBasicId "string" + +-- | tup VHDLName suffix +tupVHDLSuffix :: AST.VHDLId -> AST.Suffix +tupVHDLSuffix id = AST.SSimple id