X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=c%CE%BBash%2FCLasH%2FVHDL%2FConstants.hs;h=66c43a4395faf9148e862a0efbb9d66789961851;hb=1ccb9c8289bfb3c2701bf62435332b4c94b04169;hp=e9c4a4a2d6efc87c73f897db8910691606972727;hpb=ec4378a8a765c5a064b5cbed347b40c353c778a0;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git "a/c\316\273ash/CLasH/VHDL/Constants.hs" "b/c\316\273ash/CLasH/VHDL/Constants.hs"
index e9c4a4a..66c43a4 100644
--- "a/c\316\273ash/CLasH/VHDL/Constants.hs"
+++ "b/c\316\273ash/CLasH/VHDL/Constants.hs"
@@ -1,4 +1,4 @@
-module Constants where
+module CLasH.VHDL.Constants where
   
 import qualified Language.VHDL.AST as AST
 
@@ -16,6 +16,8 @@ resetId, clockId :: AST.VHDLId
 resetId = AST.unsafeVHDLBasicId resetStr
 clockId = AST.unsafeVHDLBasicId clockStr
 
+integerId :: AST.VHDLId
+integerId = AST.unsafeVHDLBasicId "integer"
 
 -- | \"types\" identifier
 typesId :: AST.VHDLId
@@ -261,6 +263,21 @@ toUnsignedId = "to_unsigned"
 resizeId :: String
 resizeId = "resize"
 
+-- | output file identifier (from std.textio)
+showIdString :: String
+showIdString = "show"
+
+showId :: AST.VHDLId
+showId = AST.unsafeVHDLExtId showIdString
+
+-- | write function identifier (from std.textio)
+writeId :: AST.VHDLId
+writeId = AST.unsafeVHDLBasicId "write"
+
+-- | output file identifier (from std.textio)
+outputId :: AST.VHDLId
+outputId = AST.unsafeVHDLBasicId "output"
+
 ------------------
 -- VHDL type marks
 ------------------
@@ -296,3 +313,11 @@ signedTM = AST.unsafeVHDLBasicId "signed"
 -- | unsigned TypeMark
 unsignedTM :: AST.TypeMark
 unsignedTM = AST.unsafeVHDLBasicId "unsigned"
+
+-- | string TypeMark
+stringTM :: AST.TypeMark
+stringTM = AST.unsafeVHDLBasicId "string"
+
+-- | tup VHDLName suffix
+tupVHDLSuffix :: AST.VHDLId -> AST.Suffix
+tupVHDLSuffix id = AST.SSimple id
\ No newline at end of file