X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=c%CE%BBash%2FCLasH%2FTranslator.hs;h=16158d24df07fbbf441688a313cf3863cf47a9a5;hb=eab16fafe7a623b5ea669023b91ddee4b1983526;hp=6528f540d7a4d639a6a5dc4eab1a61d1db0bce44;hpb=cf53d927025a818188af17622903df33ade92ff8;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git "a/c\316\273ash/CLasH/Translator.hs" "b/c\316\273ash/CLasH/Translator.hs" index 6528f54..16158d2 100644 --- "a/c\316\273ash/CLasH/Translator.hs" +++ "b/c\316\273ash/CLasH/Translator.hs" @@ -1,6 +1,6 @@ module CLasH.Translator - ( makeVHDLStrings - , makeVHDLAnnotations + ( -- makeVHDLStrings + makeVHDLAnnotations ) where -- Standard Modules @@ -10,8 +10,9 @@ import qualified Monad import qualified System.FilePath as FilePath import qualified Control.Monad.Trans.State as State import Text.PrettyPrint.HughesPJ (render) -import Data.Accessor +import Data.Accessor.Monad.Trans.State import qualified Data.Map as Map +import Debug.Trace -- GHC API import qualified CoreSyn @@ -32,23 +33,25 @@ import CLasH.Utils import CLasH.Utils.Core.CoreTools import CLasH.Utils.GhcTools import CLasH.VHDL +import CLasH.VHDL.VHDLTools import CLasH.VHDL.Testbench -- | Turn Haskell to VHDL, Usings Strings to indicate the Top Entity, Initial -- State and Test Inputs. -makeVHDLStrings :: - FilePath -- ^ The GHC Library Dir - -> [FilePath] -- ^ The FileNames - -> String -- ^ The TopEntity - -> String -- ^ The InitState - -> String -- ^ The TestInput - -> IO () -makeVHDLStrings libdir filenames topentity initstate testinput = do - makeVHDL libdir filenames finder - where - finder = findSpec (hasVarName topentity) - (hasVarName initstate) - (hasVarName testinput) +-- makeVHDLStrings :: +-- FilePath -- ^ The GHC Library Dir +-- -> [FilePath] -- ^ The FileNames +-- -> String -- ^ The TopEntity +-- -> String -- ^ The InitState +-- -> String -- ^ The TestInput +-- -> IO () +-- makeVHDLStrings libdir filenames topentity initstate testinput = do +-- makeVHDL libdir filenames finder +-- where +-- finder = findSpec (hasVarName topentity) +-- (hasVarName initstate) +-- (isCLasHAnnotation isInitState) +-- (hasVarName testinput) -- | Turn Haskell to VHDL, Using the Annotations for Top Entity, Initial State -- and Test Inputs found in the Files. @@ -61,6 +64,7 @@ makeVHDLAnnotations libdir filenames = do where finder = findSpec (hasCLasHAnnotation isTopEntity) (hasCLasHAnnotation isInitState) + (isCLasHAnnotation isInitState) (hasCLasHAnnotation isTestInput) -- | Turn Haskell to VHDL, using the given finder functions to find the Top @@ -92,8 +96,11 @@ moduleToVHDL env cores specs = do vhdl <- runTranslatorSession env $ do let all_bindings = concat (map (\x -> CoreSyn.flattenBinds (HscTypes.cm_binds x)) cores) -- Store the bindings we loaded - tsBindings %= Map.fromList all_bindings + tsBindings %= Map.fromList all_bindings + let all_initstates = concat (map (\x -> case x of (_, Nothing, _) -> []; (_, Just inits, _) -> inits) specs) + tsInitStates %= Map.fromList all_initstates test_binds <- catMaybesM $ Monad.mapM mkTest specs + mapM_ printAnns specs let topbinds = Maybe.catMaybes $ map (\(top, _, _) -> top) specs case topbinds of [] -> error $ "Could not find top entity requested" @@ -108,6 +115,9 @@ moduleToVHDL env cores specs = do mkTest (Just top, _, Just input) = do bndr <- createTestbench Nothing cores input top return $ Just bndr + printAnns :: EntitySpec -> TranslatorSession () + printAnns (_, Nothing, _) = trace ("no anns found:\n\n") $ return () + printAnns (_, (Just anns), _) = trace ("anns:\n\n" ++ show anns ++ "\n") $ return () -- Run the given translator session. Generates a new UniqSupply for that -- session. @@ -119,8 +129,8 @@ runTranslatorSession env session = do -- on the compiler dir of ghc suggests that 'z' is not used to generate -- a unique supply anywhere. uniqSupply <- UniqSupply.mkSplitUniqSupply 'z' - let init_typestate = TypeState Map.empty [] Map.empty Map.empty env - let init_state = TranslatorState uniqSupply init_typestate Map.empty Map.empty 0 Map.empty Map.empty + let init_typestate = TypeState builtin_types [] Map.empty Map.empty env + let init_state = TranslatorState uniqSupply init_typestate Map.empty Map.empty 0 Map.empty Map.empty Map.empty return $ State.evalState session init_state -- | Prepares the directory for writing VHDL files. This means creating the