X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=c%CE%BBash%2FCLasH%2FTranslator%2FTranslatorTypes.hs;h=c9c94055a199a124ab34588cd10f14f3f1f70fa0;hb=ca2ff678ca78a5cdbd4bc904b3075ca751018564;hp=47deeef9844d6089871ac3af4277c17513acae29;hpb=4a1b18cd81cebb66c95cc0ca8a6aaa441bee1418;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git "a/c\316\273ash/CLasH/Translator/TranslatorTypes.hs" "b/c\316\273ash/CLasH/Translator/TranslatorTypes.hs" index 47deeef..c9c9405 100644 --- "a/c\316\273ash/CLasH/Translator/TranslatorTypes.hs" +++ "b/c\316\273ash/CLasH/Translator/TranslatorTypes.hs" @@ -27,7 +27,7 @@ import CLasH.VHDL.VHDLTypes -- | A specification of an entity we can generate VHDL for. Consists of the -- binder of the top level entity, an optional initial state and an optional -- test input. -type EntitySpec = (CoreSyn.CoreBndr, Maybe CoreSyn.CoreExpr, Maybe CoreSyn.CoreExpr) +type EntitySpec = (Maybe CoreSyn.CoreBndr, Maybe CoreSyn.CoreExpr, Maybe CoreSyn.CoreExpr) -- | A function that knows which parts of a module to compile type Finder = @@ -47,6 +47,7 @@ instance Ord OrdType where data HType = StdType OrdType | ADTType String [HType] | + EnumType String [String] | VecType Int HType | SizedWType Int | RangedWType Int | @@ -86,6 +87,7 @@ data TranslatorState = TranslatorState { , tsType_ :: TypeState , tsBindings_ :: Map.Map CoreSyn.CoreBndr CoreSyn.CoreExpr , tsNormalized_ :: Map.Map CoreSyn.CoreBndr CoreSyn.CoreExpr + , tsEntityCounter_ :: Integer , tsEntities_ :: Map.Map CoreSyn.CoreBndr Entity , tsArchitectures_ :: Map.Map CoreSyn.CoreBndr (Architecture, [CoreSyn.CoreBndr]) }