X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDLTypes.hs;h=5b6807bdbc5a1864db4e636f9626007322982b44;hb=e03f02c419b4365d498c25dfbc861215394046df;hp=e517a8ba08166d6c5800bdb5d4f41b3e4ab74876;hpb=387569c4f69c310fc8832a29dfa50652ce504f7d;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/VHDLTypes.hs b/VHDLTypes.hs
index e517a8b..5b6807b 100644
--- a/VHDLTypes.hs
+++ b/VHDLTypes.hs
@@ -43,7 +43,7 @@ instance Ord OrdType where
   compare (OrdType a) (OrdType b) = Type.tcCmpType a b
 
 -- A map of a Core type to the corresponding type name
-type TypeMap = Map.Map OrdType (AST.VHDLId, AST.TypeDec)
+type TypeMap = Map.Map OrdType (AST.VHDLId, AST.TypeDef)
 
 -- A map of a vector Core type to the coressponding VHDL functions
 type TypeFunMap = Map.Map OrdType [AST.SubProgBody]