X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDLTypes.hs;h=5b6807bdbc5a1864db4e636f9626007322982b44;hb=b62b2e3aa902db1f774c2f655b25e8428e2b1cf0;hp=e517a8ba08166d6c5800bdb5d4f41b3e4ab74876;hpb=8a17f35807fb35ee4d2a4c35c75e1cf99066f94d;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/VHDLTypes.hs b/VHDLTypes.hs
index e517a8b..5b6807b 100644
--- a/VHDLTypes.hs
+++ b/VHDLTypes.hs
@@ -43,7 +43,7 @@ instance Ord OrdType where
   compare (OrdType a) (OrdType b) = Type.tcCmpType a b
 
 -- A map of a Core type to the corresponding type name
-type TypeMap = Map.Map OrdType (AST.VHDLId, AST.TypeDec)
+type TypeMap = Map.Map OrdType (AST.VHDLId, AST.TypeDef)
 
 -- A map of a vector Core type to the coressponding VHDL functions
 type TypeFunMap = Map.Map OrdType [AST.SubProgBody]