X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDLTools.hs;h=6e6a0c42acefa29ba26750443580f98aefdae18a;hb=b8c1e8554ba8aee73bc9d9a54bb3cb32f7930957;hp=1e6e5bc1d09e6a956bb5b53fc7039e2985afb406;hpb=758998d6ef18ab5124c65518781c358d76d229ab;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git a/VHDLTools.hs b/VHDLTools.hs index 1e6e5bc..6e6a0c4 100644 --- a/VHDLTools.hs +++ b/VHDLTools.hs @@ -13,7 +13,7 @@ import Data.Accessor import Debug.Trace -- ForSyDe -import qualified ForSyDe.Backend.VHDL.AST as AST +import qualified Language.VHDL.AST as AST -- GHC API import CoreSyn @@ -122,11 +122,10 @@ mkComponentInst label entity_id portassigns = AST.CSISm compins -- Functions to generate VHDL Exprs ----------------------------------------------------------------------------- --- Turn a variable reference into a AST expression -varToVHDLExpr :: TypeState -> Var.Var -> AST.Expr -varToVHDLExpr ty_state var = +varToVHDLExpr :: Var.Var -> TypeSession AST.Expr +varToVHDLExpr var = do case Id.isDataConWorkId_maybe var of - Just dc -> dataconToVHDLExpr dc + Just dc -> return $ dataconToVHDLExpr dc -- This is a dataconstructor. -- Not a datacon, just another signal. Perhaps we should check for -- local/global here as well? @@ -134,17 +133,15 @@ varToVHDLExpr ty_state var = -- should still be translated to integer literals. It is probebly not the -- best solution to translate them here. -- FIXME: Find a better solution for translating instances of tfp integers - Nothing -> - let - ty = Var.varType var - res = case Type.splitTyConApp_maybe ty of - Just (tycon, args) -> - case Name.getOccString (TyCon.tyConName tycon) of - "Dec" -> AST.PrimLit $ (show (fst ( State.runState (tfp_to_int ty) ty_state ) ) ) - otherwise -> AST.PrimName $ AST.NSimple $ varToVHDLId var - in - res - + Nothing -> do + let ty = Var.varType var + case Type.splitTyConApp_maybe ty of + Just (tycon, args) -> + case Name.getOccString (TyCon.tyConName tycon) of + "Dec" -> do + len <- tfp_to_int ty + return $ AST.PrimLit $ (show len) + otherwise -> return $ AST.PrimName $ AST.NSimple $ varToVHDLId var -- Turn a VHDLName into an AST expression vhdlNameToVHDLExpr = AST.PrimName @@ -153,7 +150,7 @@ vhdlNameToVHDLExpr = AST.PrimName idToVHDLExpr = vhdlNameToVHDLExpr . AST.NSimple -- Turn a Core expression into an AST expression -exprToVHDLExpr ty_state = (varToVHDLExpr ty_state) . exprToVar +exprToVHDLExpr core = varToVHDLExpr (exprToVar core) -- Turn a alternative constructor into an AST expression. For -- dataconstructors, this is only the constructor itself, not any arguments it @@ -473,9 +470,8 @@ mkHType ty = do case elem_htype_either of -- Could create element type Right elem_htype -> do - env <- getA vsHscEnv - let norm_ty = normalise_tfp_int env (tfvec_len_ty ty) - return $ Right $ VecType (OrdType norm_ty) elem_htype + len <- tfp_to_int (tfvec_len_ty ty) + return $ Right $ VecType len elem_htype -- Could not create element type Left err -> return $ Left $ "VHDLTools.mkHType: Can not construct vectortype for elementtype: " ++ pprString el_ty ++ "\n" @@ -527,10 +523,12 @@ isReprType ty = do tfp_to_int :: Type.Type -> TypeSession Int tfp_to_int ty = do lens <- getA vsTfpInts - let existing_len = Map.lookup (OrdType ty) lens + hscenv <- getA vsHscEnv + let norm_ty = normalise_tfp_int hscenv ty + let existing_len = Map.lookup (OrdType norm_ty) lens case existing_len of Just len -> return len Nothing -> do - let new_len = eval_tfp_int ty - modA vsTfpInts (Map.insert (OrdType ty) (new_len)) + let new_len = eval_tfp_int hscenv ty + modA vsTfpInts (Map.insert (OrdType norm_ty) (new_len)) return new_len \ No newline at end of file